M68HC08 datasheet(191/332 Pages) FREESCALE

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Universal Serial Bus Module (USB)

MC68HC908JB16 — Rev. 1.1

Technical Data

Freescale Semiconductor

Universal Serial Bus Module (USB)

191

If this bit is 0 or the TXD1F is set, the USB will respond with a NAK

handshake to any endpoint 1 directed IN tokens. Reset clears this bit.

1 = Data is ready to be sent

0 = Data is not ready. Respond with NAK

FRESUM — Force Resume

This read/write bit forces a resume state (K or non-idle state) onto the

USB data lines to initiate a remote wakeup. Software should control

the timing of the forced resume to be between 10 and 15 ms. Setting

this bit will not cause the RESUMF bit to be set.

1 = Force data lines to K state

0 = Default

TP1SIZ3–TP1SIZ0 — Endpoint 1 Transmit Data Packet Size

These read/write bits store the number of transmit data bytes for the

next IN token request for endpoint 1. These bits are cleared by reset.

11.8.7 USB Control Register 2

T2SEQ — Endpoint 2 Transmit Sequence Bit

This read/write bit determines which type of data packet (DATA0 or

DATA1) will be sent during the next IN transaction directed to

endpoint 2. Toggling of this bit must be controlled by software. Reset

clears this bit.

1 = DATA1 token active for next endpoint 2 transmit

0 = DATA0 token active for next endpoint 2 transmit

Address:

$0019

Bit 7

654321

Bit 0

Read:

T2SEQ

STALL2

TX2E

RX2E

TP2SIZ3 TP2SIZ2 TP2SIZ1 TP2SIZ0

Write:

Reset:

00000000

Figure 11-21. USB Control Register 2 (UCR2)

M68HC08 Datasheet(PDF) 191 Page - Freescale Semiconductor, Inc

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