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EP3SE110 Datasheet(PDF) 330 Page - Altera Corporation |
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EP3SE110 Datasheet(HTML) 330 Page - Altera Corporation |
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330 / 341 page ![]() 1–320 Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics I/O Timing Stratix III Device Handbook, Volume 2 © July 2010 Altera Corporation Table 1–180 and Table 1–181 list the regional clock timing parameters for EP3SE50 devices. Table 1–182 and Table 1–183 list the periphery clock timing parameters for EP3SE50 devices. Table 1–180. EP3SE50 Column Pin Regional Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.711 1.721 2.429 2.679 3.053 2.767 3.191 2.679 3.053 2.767 3.191 ns t COUT 1.711 1.721 2.429 2.679 3.053 2.767 3.191 2.679 3.053 2.767 3.191 ns t PLLCIN 0.034 0.038 -0.193 -0.255 -0.212 -0.168 0.040 -0.255 0.263 -0.168 0.040 ns t PLLCOUT 0.106 0.102 -0.074 -0.101 -0.212 -0.168 0.040 -0.101 0.263 -0.168 0.040 ns Table 1–181. EP3SE50 Row Pin Regional Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.640 1.732 2.361 2.580 2.905 2.810 2.977 2.636 2.960 2.868 3.003 ns t COUT 1.558 1.641 2.219 2.417 2.724 2.639 2.818 2.466 2.771 2.689 2.844 ns t PLLCIN 0.020 0.091 -0.168 -0.241 -0.208 -0.155 -0.210 -0.191 0.321 -0.108 -0.264 ns t PLLCOUT -0.062 0.000 -0.310 -0.404 -0.389 -0.326 -0.369 -0.361 0.132 -0.287 -0.423 ns Table 1–182. EP3SE50 Column Pin Periphery Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.472 1.481 2.155 2.417 2.825 2.681 3.247 2.417 2.819 2.681 3.247 ns t COUT 1.472 1.481 2.155 2.417 2.825 2.681 3.247 2.417 2.819 2.681 3.247 ns t PLLCIN -0.047 -0.044 -0.288 -0.347 -0.302 -0.266 -0.079 -0.347 0.300 -0.266 -0.079 ns t PLLCOUT -0.047 -0.044 -0.288 -0.347 -0.302 -0.266 -0.079 -0.347 0.300 -0.266 -0.079 ns Table 1–183. EP3SE50 Row Pin Periphery Clock Timing Specifications Parameter Fast Model C2 C3 C4 C4L I3 I4 I4L Units Industrial Commercial V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 1.1 V V CCL= 0.9 V t CIN 1.467 1.543 2.208 2.472 2.843 2.729 3.012 2.521 2.891 2.771 3.028 ns t COUT 1.385 1.452 2.063 2.309 2.662 2.558 2.853 2.351 2.702 2.592 2.869 ns t PLLCIN -0.021 0.036 -0.231 -0.307 -0.282 -0.230 -0.301 -0.262 0.372 -0.184 -0.361 ns t PLLCOUT -0.103 -0.055 -0.373 -0.470 -0.463 -0.401 -0.460 -0.432 0.183 -0.363 -0.520 ns |
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