PIC16LF1824 datasheet(223/440 Pages) MICROCHIP

223 / 440 page

 2011-2013 Microchip Technology Inc.

Preliminary

DS40001453D-page 223

PIC16(L)F1847

24.4.6

PWM STEERING MODE

In Single Output mode, PWM steering allows any of the

PWM pins to be the modulated signal. Additionally, the

same PWM signal can be simultaneously available on

multiple pins.

Once

the

Single

Output

mode

selected

(CCPxM<3:2> = 11 and PxM<1:0> = 00 of the

CCPxCON register), the user firmware can bring out

the same PWM signal to one, two, three or four output

pins by setting the appropriate STRx<D:A> bits of the

PSTRxCON register, as shown in Register 24-5.

While the PWM Steering mode is active, CCPxM<1:0>

bits of the CCPxCON register select the PWM output

polarity for the Px<D:A> pins.

The PWM auto-shutdown operation also applies to

PWM Steering mode as described in Section 24.4.3

“Enhanced PWM Auto-shutdown mode”. An

auto-shutdown event will only affect pins that have

PWM outputs enabled.

FIGURE 24-18:

SIMPLIFIED STEERING

BLOCK DIAGRAM

24.4.6.1

Steering Synchronization

The STRxSYNC bit of the PSTRxCON register gives

the user two selections of when the steering event will

happen. When the STRxSYNC bit is ‘0’, the steering

event will happen at the end of the instruction that

writes to the PSTRxCON register. In this case, the

output signal at the Px<D:A> pins may be an

incomplete PWM waveform. This operation is useful

when the user firmware needs to immediately remove

a PWM signal from the pin.

When the STRxSYNC bit is ‘1’, the effective steering

update will happen at the beginning of the next PWM

period. In this case, steering on/off the PWM output will

always produce a complete PWM waveform.

Figure 24-19 and Figure 24-20 illustrate the timing

diagrams of the PWM steering depending on the

STRxSYNC setting.

24.4.7

START-UP CONSIDERATIONS

When any PWM mode is used, the application

hardware must use the proper external pull-up and/or

pull-down resistors on the PWM output pins.

The CCPxM<1:0> bits of the CCPxCON register allow

the user to choose whether the PWM output signals are

active-high or active-low for each pair of PWM output

pins (PxA/PxC and PxB/PxD). The PWM output

polarities must be selected before the PWM pin output

drivers

are

enabled.

Changing

the

polarity

configuration while the PWM pin output drivers are

enable is not recommended since it may result in

damage to the application circuits.

The PxA, PxB, PxC and PxD output latches may not be

in the proper states when the PWM module is

initialized. Enabling the PWM pin output drivers at the

same time as the Enhanced PWM modes may cause

damage to the application circuit. The Enhanced PWM

modes must be enabled in the proper Output mode and

complete a full PWM cycle before enabling the PWM

pin output drivers. The completion of a full PWM cycle

is indicated by the TMRxIF bit of the PIRx register

being set as the second PWM period begins.

Note:

The associated TRIS bits must be set to

output (‘0’) to enable the pin output driver

in order to see the PWM signal on the pin.

TRIS

PxA pin

PORT Data

PxA Signal

STRxA

TRIS

PxB pin

PORT Data

STRxB

TRIS

PxC pin

PORT Data

STRxC

TRIS

PxD pin

PORT Data

STRxD

Note 1:

Port outputs are configured as shown when

the CCPxCON register bits PxM<1:0> = 00

and CCPxM<3:2> = 11.

Single PWM output requires setting at least

one of the STRx bits.

CCPxM1

CCPxM0

CCPxM1

CCPxM0

Note:

When the microcontroller is released from

Reset, all of the I/O pins are in the

high-impedance state. The external cir-

cuits must keep the power switch devices

in the Off state until the microcontroller

drives the I/O pins with the proper signal

levels or activates the PWM output(s).

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