LM5060 datasheet(13/33 Pages) TI

13 / 33 page

LM5060

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SNVS628F – OCTOBER 2009 – REVISED APRIL 2013

FAULT TIMER

An external capacitor connected from the TIMER pin to the GND pin sets the fault detection delay time. If the

voltage on the TIMER capacitor reaches the VTMRH threshold (2V typical) a fault condition is indicated. The

LM5060 will latch off the MOSFET by discharging the GATE pin at a 80mA (typical) rate, and will remain latched

off until either the EN pin, the UVLO pin, or the VIN pin is toggled low and then high.

The block diagram of the LM5060 shows the details of the TIMER pin. There are three relevant components to

the TIMER pin’s function:

1. A constant 6 µA (typical) current source driving the TIMER pin. This current source is active when EN,

UVLO, and VIN are all high.

2. A second current source (5 µA typical) is activated, for a total charge current of 11 µA (typical), only when

the VGS sequence has completed successfully.

3. A pull-down current sink for the TIMER pin which resets the timer by discharging the timer capacitor. If EN,

UVLO or VIN is low, or when OVP is high, the timer capacitor is discharged.

(a) When the VDS Fault Comparator detects a fault, (SENSE pin voltage higher than OUT pin voltage) the

timer capacitor pull down is disabled and the timer capacitor is allowed to charge at the 11 µA (typical)

rate.

During Start-Up, the timer behaves as follows:

After applying sufficient system voltage and enabling the LM5060 by pulling the EN and UVLO pins high, the

timer capacitor will be charged with a 6 µA (typical) current source. The timer capacitor is discharged when the

voltage difference between the GATE pin and the OUT pin (i.e. VGS of the external N-Channel MOSFET)

reaches the VGATE-TH threshold (typically 5V). After discharging, the timer capacitor is charged with 11 µA until

either the VTMRH threshold (typically 2V) is reached, or the sensed VDS voltage falls below the threshold of the

VDS Fault Comparator, indicating the output voltage has reached the desired steady state level. The timer

capacitor voltage waveforms are illustrated in Figure 22, Figure 23 and Figure 24.

A timer capacitor is always necessary to allow some finite amount of time for the gate to charge and the output

voltage to rise during startup. If an adequate timer capacitor value is not used, then the 6 µA of charge current

would cause the TIMER pin voltage to reach the VTMRH fault threshold (typically 2V) prematurely and the LM5060

will latch off since a fault condition would have been indicated.

Although not recommended, the timer function can be disabled by connecting the TIMER pin directly to GND.

With this condition the TIMER pin voltage will never reach the VTMRH fault threshold (2V typical). The end result is

that the fault latch-off protection is completely disabled, while the nPGD pin will continue to reflect the VDS Fault

Comparator output.

VGS CONSIDERATIONS

The VGS Status Comparator shown in the LM5060 block diagram accomplishes two purposes:

1. As the gate of the external MOSFET is charged, the VGS voltage transitions from cut-off, through an active

region, and into the ohmic region. The LM5060 provides two fault timer modes to monitor these transitions.

The TIMER pin capacitor is initially charged with a constant 6 µA (typical) until either the MOSFET VGS

reaches the VGATE–TH threshold (typically 5V) indicating that the MOSFET channel is at least somewhat

enhanced, or the voltage on the TIMER pin reaches the VTMRH threshold (typically 2V) indicating a fault

condition. If the MOSFET VGS reaches 5V threshold before the TIMER pin reaches the typical 2V timer fault

threshold, the timer capacitor is then discharged to 300 mV, and then begins charging with 11 µA current

source while the MOSFET transitions through the active region. The lower timer capacitor charge current

during the initial start-up sequence allows more time before a fault is indicated. The turn-on time of the

MOSFET will vary with input voltage, load capacitance, load resistance, as well as the MOSFET

characteristics.

2. Figure 23 shows a start-up waveform with excessive gate leakage. The initial charge current on the timer

capacitor is 6 µA (typical), while the simultaneous charge current to the gate is 24 µA (typical). Due to

excessive gate leakage, the 24 µA is not able to charge the gate to the required typical 5V VGS threshold and

the VDS Fault Comparator will indicate a fault when the timer capacitor is charged to the VTMRH fault

threshold. When the timer capacitor voltage reaches theVTMRH fault threshold (typically 2V) the MOSFET

gate is discharged at an 80 mA (typical) rate.

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