DAC80P datasheet(2/10 Pages) TI

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DAC80/80P

DAC80

PARAMETER

MIN

TYP

MAX

UNITS

DIGITAL INPUT

Resolution

Bits

Logic Levels (0

°C to +70°C)(1):

VIH (Logic “1”)

+16.5

VDC

VIL (Logic “0”)

+0.8

VDC

IIH (VIN = +2.4V)

+20

µA

IIL (VIN = +0.4V)

–180

µA

ACCURACY (at +25

°C)

Linearity Error

±1/4

±1/2

LSB

Differential Linearity Error

±1/2

±3/4

LSB

Gain Error(2)

±0.1

±0.3

Offset Error(2)

±0.05

±0.15

% of FSR(3)

DRIFT (0

°C to +70°C)(4)

Total Bipolar Drift (includes gain, offset, and linearity drifts)

±10

±25

ppm of FSR/

°C

Total Error Over 0

°C to +70°C(5)

Unipolar

±0.06

±0.15

% of FSR

Bipolar

±0.06

±0.12

% of FSR

Gain: Including Internal Reference

±10

±30

ppm/

°C

Excluding Internal Reference

±5

±10

ppm/

°C

Unipolar Offset

±1

±3

ppm of FSR/

°C

Bipolar Offset

±7

±15

ppm of FSR/

°C

Differential Linearity 0

°C to +70°C

±1/2

±3/4

LSB

Linearity Error 0

°C to +70°C

±1/4

±1/2

LSB

Monotonicity Guaranteed

+70

°C

CONVERSION SPEED, VOUT Models

Settling Time to

±0.01% of FSR

For FSR Change (2k

Ω || 500pF Load)

with 10k

Ω Feedback

µs

with 5k

Ω Feedback

µs

For 1LSB Change

µs

Slew Rate

µs

CONVERSION SPEED, IOUT Models

Settling Time to

±0.01% of FSR

For FSR change: 10

Ω to 100Ω Load

300

Ω Load

µs

ANALOG OUTPUT, VOUT Models

Ranges

Output Current(6)

±5mA

Output Impedance (DC)

0.05

Ω

Short Circuit to Common, Duration(7)

Indefinite

ANALOG OUTPUT, IOUT Models

Ranges: Bipolar

±0.96

±1.0

±1.04

Unipolar

–1.96

–2.0

–2.04

Output Impendance: Bipolar

2.6

3.2

3.7

Ω

Unipolar

4.6

6.6

8.6

Ω

Compliance

–2.5

+2.5

REFERENCE VOLTAGE OUTPUT

+6.23

+6.30

+6.37

External Current (constant load)

2.5

Drift vs Temperature

±10

±20

ppm/

°C

Output Impedance

Ω

POWER SUPPLY SENSITIVITY

VCC = ±12VDC or ±15VDC

±0.002

±0.006

% FSR/ % VCC

POWER SUPPLY REQUIREMENTS

±V

±11.4

±16.5

VDC

Supply Drain (no load): +VCC

812

–VCC

Power Dissipation (VCC = ±15VDC)

345

480

TEMPERATURE RANGE

Specification

+70

°C

Operating

–25

+85

°C

Storage: Plastic DIP

–60

+100

°C

Ceramic DIP

–65

+150

°C

SPECIFICATIONS

ELECTRICAL

Typical at +25

°C and ±V

CC = 12V or 15V unless otherwise noted.

NOTES: (1) Refer to “Logic Input Compatibility” section. (2) Adjustable to zero with external trim potentiometer. (3) FSR means full scale range and is 20V for

±10V range,

10V for

±5V range for V

OUT models; 2mA for IOUT models. (4) To maintain drift spec, internal feedback resistors must be used. (5) Includes the effects of gain, offset

and linearity drift. Gain and offset errors externally adjusted to zero at +25

°C. (6) For ±V

CC less than ±12VDC, limit output current load to ±2.5mA to maintain ±10V full

scale output voltage swing. For output range of

±5V or less, the output current is ±5mA over entire ±V

CC range. (7) Short circuit current is 40mA, max.

±2.5, ±5, ±10, +5, +10

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