Electronic Components Datasheet Search
  English  ▼

X  

DDC112Y/2K Datasheet(PDF) 22 Page - Texas Instruments

Click here to check the latest version.
Part # DDC112Y/2K
Description  Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DDC112Y/2K Datasheet(HTML) 22 Page - Texas Instruments

Back Button DDC112Y/2K Datasheet HTML 18Page - Texas Instruments DDC112Y/2K Datasheet HTML 19Page - Texas Instruments DDC112Y/2K Datasheet HTML 20Page - Texas Instruments DDC112Y/2K Datasheet HTML 21Page - Texas Instruments DDC112Y/2K Datasheet HTML 22Page - Texas Instruments DDC112Y/2K Datasheet HTML 23Page - Texas Instruments DDC112Y/2K Datasheet HTML 24Page - Texas Instruments DDC112Y/2K Datasheet HTML 25Page - Texas Instruments DDC112Y/2K Datasheet HTML 26Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 34 page
background image
DDC112
22
SBAS085B
www.ti.com
RETRIEVAL
BEFORE CONV TOGGLES
(CONTINUOUS MODE)
This is the most straightforward method. Data retrieval be-
gins soon after DVALID goes LOW and finishes before
CONV toggles, see Figure 24. For best performance, data
retrieval must stop t28 before CONV toggles. This method is
the most appropriate for longer integration times. The maxi-
mum time available for readback is TINT – t27 – t28.
For DCLK and CLK = 10MHz, the maximum number of
DDC112s that can be daisy-chained together is:
Ts
INT
DCLK
–
.
431 2
40
µ
τ
Where
τ
DCLK is the period of the data clock. For example, if
TINT = 1000µs and DCLK = 10MHz, the maximum number of
DDC112s is:
1000
431 2
40 100
142 2
142
112
µµ =→
ss
ns
DDC
s
–
.
()(
)
.
RETRIEVAL
AFTER CONV TOGGLES
(CONTINUOUS MODE)
For shorter integration times, more time is available if data
retrieval begins after CONV toggles and ends before the new
data is ready. Data retrieval must wait t29 after CONV toggles
before beginning. Figure 25 shows an example of this. The
maximum time available for retrieval is t27 – t29 – t26
(421.2
µs – 10µs – 2µs for CLK = 10MHz), regardless of T
INT.
The maximum number of DDC112s that can be daisy-
chained together is:
409 2
40
.
µs
DCLK
τ
For DCLK = 10MHz, the maximum number of DDC112s is
102.
FIGURE 23. Timing Diagram When Using the DIN Function of the DDC112.
t
18
t
14
t
20
t
21
t
22
t
23
t
24
t
25
Output Disabled
Output Enabled
Output Disabled
CLK
DVALID
DXMIT
DCLK(1)
DIN
Input A
Bit 1
Input E
Bit 20
Input F
Bit 1
Input F
Bit 20
MSB
Output Disabled
Output Enabled
LSB
LSB
Output Disabled
MSB
DOUT
NOTE: (1) Disable DCLK (preferably LOW) when DXMIT is HIGH.
t
26
t
22A, t22B
TABLE X. Timing for the DDC112 Data Retrieval Using DIN.
CLK = 10MHz
CLK = 15MHz
SYMBOL
DESCRIPTION
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
t24
Set-Up Time From DIN to Rising Edge of DCLK
10
5
ns
t25
Hold Time For DIN After Rising Edge of DCLK
10
10
ns
t26
Hold Time for DXMIT HIGH Before Falling
2
1.33
µs
Edge of DVALID



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com