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AD8280 Datasheet(PDF) 18 Page - Analog Devices |
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AD8280 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 24 page ![]() AD8280 Rev. C | Page 18 of 24 TOP AND BOTTOM PART DESIGNATION When configured in a daisy chain, the AD8280 operates differ- ently, depending on where it is in the chain: top part (highest potential), middle part, or bottom part (lowest potential). The TOP and BOT pins are used to designate the location of each part in the daisy chain. Table 6 is the logic table for identifying the location of the part in the daisy chain or, when not used in a daisy chain, identifying it as a single (standalone) part. The logic high and logic low for the TOP and BOT pins are different from those of the other logic pins of the AD8280. The TOP and BOT pins are referenced to VTOP (logic high) and VBOTx (logic low), respectively. Table 6. Designation of the AD8280 in Daisy-Chain and Standalone Configurations Desired Condition TOP1 BOT1 Middle part (middle potential part) 0 0 Bottom part (lowest potential part) 0 1 Top part (highest potential part) 1 0 Single part (highest and lowest potential part) 1 1 1 For the TOP and BOT pins only, Logic 1 is VTOP and Logic 0 is VBOTx. Bottom Part in Daisy-Chain Configuration The bottom part in a daisy-chain configuration is the master part and accepts voltage inputs into the ENBI and TESTI pins. The AIINOV, AIINUV, and AIINOT pins of the bottom part are connected to the AIOUTOV, AIOUTUV, and AIOUTOT pins, respectively, of the next higher potential part in the daisy chain. The AIOUTOV, AIOUTUV, and AIOUTOT pins of the bottom part can be left floating, or they can be tied to part ground (VBOTx). Middle Part in Daisy-Chain Configuration When the AD8280 is designated as a middle part, the AIINOV, AIINUV, AIINOT, ENBO, and TESTO pins are connected to the AIOUTOV, AIOUTUV, AIOUTOT, ENBI, and TESTI pins, respectively, of the AD8280 above it. Top Part in Daisy-Chain Configuration When the AD8280 is designated as a top part, the AIINOV, AIINUV, AIINOT, ENBO, and TESTO pins can be left floating, or they can be tied to VTOP. Standalone Part When the AD8280 is designated as a single part (used as a stand- alone part), the AIOUTOV, AIOUTUV, and AIOUTOT pins can be left floating, or they can be tied to part ground (VBOTx). The AIINOV, AIINUV, AIINOT, ENBO, and TESTO pins can be left floating or tied to VTOP. The AD8280 accepts voltage inputs into the ENBI and TESTI pins. Alarm Signals in Daisy-Chain Configuration Regardless of the part designation, the alarm signals are available as voltage outputs on any part in the chain on the AVOUTOV, AVOUTUV, and AVOUTOT pins. These signals indicate the status of the part where the voltage alarms are monitored, as well as the status of the parts above it in the daisy chain. Make sure to use isolators to bring those signals outside the high voltage battery environment. TYPICAL DAISY-CHAIN CONNECTIONS Figure 50 shows the typical connections for configuring the part in a daisy chain. SHARED OR SEPARATE ALARMS The AD8280 can be configured for three separate alarms or for one shared alarm. Tying the ALRMSEL pin to a 5 V logic high forces the part into separate alarm mode. In this mode, each alarm trips only for its designated monitoring function. That is, the OV alarm trips only if an overvoltage condition exists at any of the cell inputs, the UV alarm trips only if an undervoltage condition exists at any of the cell inputs, and the OT alarm trips only if an overtemperature condition exists at either of the temperature inputs. In shared alarm mode, any of the three conditions—overvoltage, undervoltage, or overtemperature—trips the alarm on all three signal chains. In shared mode, it is necessary to monitor only one alarm because all three contain the same signal. DEGLITCHING OPTIONS The deglitching circuitry is available so that the part is immune to transients occurring at the cell inputs. If a transient voltage of a high or low enough level to trip an alarm occurs at the input to the part, the alarm state does not occur if the transient voltage is present for less than the selected deglitch time. The DGT0, DGT1, and DGT2 pins are used to establish the deglitch time. Table 7 shows the options available and the corresponding logic levels to use when setting the deglitch time with the DGT0, DGT1, and DGT2 pins. Table 7. Fault Detection Time Pin Programming Deglitch Time DGT0 DGT1 DGT2 0.0 sec 0 0 0 0.1 sec 0 0 1 0.8 sec 0 1 0 1.6 sec 0 1 1 3.2 sec 1 0 0 6.4 sec 1 0 1 12.8 sec 1 1 0 Do not tie all three deglitching pins (DGT0, DGT1, and DGT2) to logic high (111); this setting is used only during the testing of the part at the factory. Setting the deglitch time to 0.0 sec (000) allows the use of an external deglitching circuit, if desired. Additionally, when the deglitch time is set to 0.0 sec, the time required to ensure that the part has completed its self-test is significantly reduced (see the Self-Test section). The DGTx pins should be tied to a fixed logic level and not toggled or changed during operation of the AD8280. |
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