DOC7707 datasheet(210/307 Pages) ETC1

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210

7707F–AVR–11/10

AT90USB82/162

• 3 - EORSTI - End Of Reset Interrupt Flag

Set by hardware when an “End Of Reset” has been detected by the USB controller. This triggers

an USB interrupt if EORSTE is set.

Shall be cleared by software. Setting by software has no effect.

• 2 - SOFI - Start Of Frame Interrupt Flag

Set by hardware when an USB “Start Of Frame” PID (SOF) has been detected (every 1 ms).

This triggers an USB interrupt if SOFE is set..

• 1 - Reserved

• 0 - SUSPI - Suspend Interrupt Flag

Set by hardware when an USB “Suspend” ‘idle bus for 3 frame periods: a J state for 3 ms) is

detected. This triggers an USB interrupt if SUSPE is set.

Shall be cleared by software. Setting by software has no effect.

See Section 20.8, page 199 for more details.

The interrupt flags bits are set even if their corresponding ‘Enable’ bits is not set.

• 7 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 6 - UPRSME - Upstream Resume Interrupt Enable Bit

Set to enable the UPRSMI interrupt.

Clear to disable the UPRSMI interrupt.

• 5 - EORSME - End Of Resume Interrupt Enable Bit

Set to enable the EORSMI interrupt.

Clear to disable the EORSMI interrupt.

• 4 - WAKEUPE - Wake-up CPU Interrupt Enable Bit

Set to enable the WAKEUPI interrupt.

Clear to disable the WAKEUPI interrupt.

• 3 - EORSTE - End Of Reset Interrupt Enable Bit

Set to enable the EORSTI interrupt. This bit is set after a reset.

Clear to disable the EORSTI interrupt.

• 2 - SOFE - Start Of Frame Interrupt Enable Bit

Set to enable the SOFI interrupt.

Bit

432

UPRSME

EORSME

WAKEUPE

EORSTE

SOFE

SUSPE

UDIEN

Read/Wri

R/W

Initial

Value

000

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