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TMS320DM6467 Datasheet(PDF) 33 Page - Texas Instruments |
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TMS320DM6467 Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 355 page ![]() TMS320DM6467 www.ti.com SPRS403H – DECEMBER 2007 – REVISED JUNE 2012 3.7.3 Clock Generator Table 3-7. Clock Generator Terminal Functions SIGNAL TYPE(1) OTHER(2) (3) DESCRIPTION NAME NO. CLOCK GENERATOR CLKOUT0 C13 O/Z DVDD33 Configurable output clock. GP[3]/ IPD This pin is multiplexed between GPIO and the Audio Clock Selector. For the audio AB3 I/O/Z AUDIO_CLK0 DVDD33 clock selector, this pin is the configurable AUDIO_CLK0 output. GP[2]/ IPD This pin is multiplexed between GPIO and the Audio Clock Selector. For the audio AA4 I/O/Z AUDIO_CLK1 DVDD33 clock selector, this pin is the configurable AUDIO_CLK1 output. This pin is multiplexed between GPIO and the TSIF Clock Selector. For TSIF, this GP[4]/ IPD AC3 I/O/Z pin is the STC_CLKIN which can be used as an external clock source for the TSIF STC_CLKIN DVDD33 counters or as TSIF output clock. (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal Copyright © 2007–2012, Texas Instruments Incorporated Device Overview 33 Submit Documentation Feedback Product Folder Link(s): TMS320DM6467 |
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