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EP3C80 Datasheet(PDF) 151 Page - Altera Corporation |
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EP3C80 Datasheet(HTML) 151 Page - Altera Corporation |
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151 / 274 page  Chapter 8: External Memory Interfaces in the Cyclone III Device Family 8–9 Cyclone III Device Family Memory Interfaces Pin Support July 2012 Altera Corporation Cyclone III Device Handbook Volume 1 Figure 8–3 shows the location and numbering of the DQS, DQ, or CQ# pins in I/O banks of the Cyclone III device in the 144-pin EQFP and 164-pin MBGA packages only. Figure 8–2. DQS, CQ, or CQ# Pins in Cyclone III Device Family I/O Banks (1) Note to Figure 8–2: (1) The DQS, CQ, or CQ# pin locations in this diagram apply to all packages in Cyclone III device family except devices in 144-pin EQFP and 164-pin MBGA. I/O Bank 8 I/O Bank 7 I/O Bank 3 I/O Bank 4 Cyclone III Device Family DQS2L/CQ3L DQS0L/CQ1L DQS1L/CQ1L# DQS3L/CQ3L# DQS2R/CQ3R DQS0R/CQ1R DQS1R/CQ1R# DQS3R/CQ3R# Figure 8–3. DQS, CQ, or CQ# Pins for Devices in the 144-Pin EQFP and 164-Pin MBGA Packages Cyclone III Devices in 144-pin EQFP and 164-pin MBGA I/O Bank 8 I/O Bank 7 I/O Bank 4 I/O Bank 3 DQS0L/CQ1L DQS1L/CQ1L# DQS1R/CQ1R# DQS0R/CQ1R |
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