ADSP-21060 datasheet(19/64 Pages) AD

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ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC

Rev. H

Page 19 of 64

March 2013

INTERNAL POWER DISSIPATION (3.3 V)

These specifications apply to the internal power portion of VDD

only. For a complete discussion of the code used to measure

power dissipation, see the technical note “SHARC Power Dissi-

pation Measurements.”

Specifications are based on the operating scenarios.

To estimate power consumption for a specific application, use

the following equation where % is the amount of time your pro-

gram spends in that state:

%PEAK IDDINPEAK + %HIGH IDDINHIGH + %LOW IDDINLOW +

%IDLE IDDIDLE = Power Consumption

Operation

Peak Activity (IDDINPEAK)

High Activity (IDDINHIGH)

Low Activity (IDDINLOW)

Instruction Type

Multifunction

Single Function

Instruction Fetch

Cache

Internal Memory

Core memory Access

2 Per Cycle (DM and PM)

1 Per Cycle (DM)

None

Internal Memory DMA

1 Per Cycle

1 Per 2 Cycles

Parameter

Test Conditions

Max

Unit

IDDINPEAK Supply Current (Internal)

tCK = 30 ns, VDD = Max

tCK = 25 ns, VDD = Max

540

600

IDDINHIGH Supply Current (Internal)

tCK = 30 ns, VDD = Max

tCK = 25 ns, VDD = Max

425

475

IDDINLOW Supply Current (Internal)

tCK = 30 ns, VDD = Max

tCK = 25 ns, VDD = Max

250

275

IDDIDLE Supply Current (Idle)

VDD = Max

180

1 The test program used to measure IDDINPEAK represents worst case processor operation and is not sustainable under normal application conditions. Actual internal power

measurements made using typical applications are less than specified.

2 IDDINHIGH is a composite average based on a range of high activity code. IDDINLOW is a composite average based on a range of low activity code.

3 Idle denotes ADSP-2106xL state during execution of IDLE instruction.

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