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Revision 1.11

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AS5013

Datasheet - I² C Registers

8.2 X Register (10h)

8.3 Y_res_int Register (11h)

8.4 Xp Register (12h)

8.5 Xn Register (13h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

X[7]

X[6]

X[5]

X[4]

X[3]

X[2]

X[1]

X[0]

R

R

R

RRRR

R

Reset value: 0000 0000

Bit

Bit Description

7:0

X coordinate, Two’s complement format (signed -128 ~ +127).

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Y[7]

Y[6]

Y[5]

Y[4]

Y[3]

Y[2]

Y[1]

Y[0]

R

R

R

RRRR

R

Reset value: 0000 0000

Bit

Bit Description

7:0

Y coordinate, Two’s complement format (signed -128 ~ +127).

Reading this register will reset the INTn output to Hi-Z after the ACK bit of Y_res_int register readback.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Xp[7]

Xp[6]

Xp[5]

Xp[4]

Xp[3]

Xp[2]

Xp[1]

Xp[0]

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset value: 0000 0101 (5d)

Bit

Bit Description

7:0

Xp range value, Two’s complement (signed: -128 ~ +127).

Determines the LEFT threshold for the activation of INTn output (if output enabled), when bit INT_function = 1

(see Control Register 1 (0Fh) on page 17).

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Xn[7]

Xn[6]

Xn[5]

Xn[4]

Xn[3]

Xn[2]

Xn[1]

Xn[0]

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset value: 1111 1011 (-5d)

Bit

Bit Description

7:0

Xn range value, Two’s complement (signed: -128 ~ +127).

Determines the RIGHT threshold for the activation of INTn output (if output enabled), when bit INT_function = 1

(see Control Register 1 (0Fh) on page 17).