ADS1278IPAPR datasheet(37/51 Pages) TI1

37 / 51 page

ADS1274

ADS1278

www.ti.com

SBAS367F

– JUNE 2007 – REVISED FEBRUARY 2011

APPLICATION INFORMATION

5. Reference Inputs: It is recommended to use a

obtain

the

specified

performance

from

the

minimum 10

μF tantalum with a 0.1μF ceramic

ADS1274/78, the following layout and component

capacitor directly across the reference inputs,

guidelines should be considered.

VREFP and VREFN. The reference input should

1. Power Supplies: The device requires three

be driven by a low-impedance source. For best

power supplies for operation: DVDD, IOVDD, and

performance, the reference should have less than

AVDD. The allowed range for DVDD is 1.65V to

μVRMS in-band noise. For references with noise

1.95V; (for 32.768MHz

< fCLK ≤ 37MHz: 2.0V to

higher than this level, external reference filtering

2.2V) the range of IOVDD is 1.65V to 3.6V;

may be necessary.

AVDD is restricted to 4.75V to 5.25V. For all

6. Analog Inputs: The analog input pins must be

supplies,

use

μF

tantalum

capacitor,

driven

differentially

achieve

specified

bypassed with a 0.1

μF ceramic capacitor, placed

performance.

true

differential

driver

close to the device pins. Alternatively, a single

transformer (ac applications) can be used for this

μF ceramic capacitor can be used. The

purpose. Route the analog inputs tracks (AINP,

supplies should be relatively free of noise and

AINN) as a pair from the buffer to the converter

should not be shared with devices that produce

using short, direct tracks and away from digital

voltage spikes (such as relays, LED display

tracks. A 1nF to 10nF capacitor should be used

drivers, etc.). If a switching power-supply source

directly across the analog input pins, AINP and

is used, the voltage ripple should be low (less

AINN. A low-k dielectric (such as COG or film

than 2mV) and the switching frequency outside

type) should be used to maintain low THD.

the passband of the converter.

Capacitors from each analog input to ground can

2. Ground Plane: A single ground plane connecting

be used. They should be no larger than 1/10 the

both AGND and DGND pins can be used. If

size of the difference capacitor (typically 100pF)

separate digital and analog grounds are used,

to preserve the ac common-mode performance.

connect the grounds together at the converter.

7. Component Placement: Place the power supply,

3. Digital

Inputs:

recommended

analog

input,

and

reference

input

bypass

source-terminate the digital inputs to the device

capacitors as close as possible to the device

with 50

Ω series resistors. The resistors should be

pins. This layout is particularly important for

placed close to the driving end of digital source

small-value ceramic capacitors. Larger (bulk)

(oscillator, logic gates, DSP, etc.) This placement

decoupling capacitors can be located farther from

helps to reduce ringing on the digital lines (ringing

the device than the smaller ceramic capacitors.

may lead to degraded ADC performance).

Figure 88 to Figure 90 illustrate basic connections

4. Analog/Digital Circuits: Place analog circuitry

and interfaces that can be used with the ADS1274.

(input buffer, reference) and associated tracks

together, keeping them away from digital circuitry

(DSP,

microcontroller,

logic).

Avoid

crossing

digital tracks across analog tracks to reduce

noise coupling and crosstalk.

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