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GR712RC Datasheet(PDF) 39 Page - Aeroflex Circuit Technology

Part # GR712RC
Description  Dual-Core LEON3-FT SPARC V8 Processor
PDF  48 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

GR712RC Datasheet(HTML) 39 Page - Aeroflex Circuit Technology

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AEROFLEX GAISLER
39
GR712RC-DS
Copyright Aeroflex Gaisler AB
February 2013, Issue 2.0
79
GND
Core Supply Ground
80
ADDRESS[10]
Out
100
-
Low
Address Bit 10
81
ADDRESS[11]
Out
100
-
Low
Address Bit 11
82
ADDRESS[12]
Out
100
-
Low
Address Bit 12
83
VDDIO
I/O Supply Voltage
84
GNDIO
I/O Supply Ground
85
ADDRESS[23]
Out
50
-
Low
Address Bit 23
86
ADDRESS[13]
Out
100
-
Low
Address Bit 13
87
ADDRESS[22]
Out
50
-
Low
Address Bit 22
88
ADDRESS[21]
Out
50
-
Low
Address Bit 21
89
ADDRESS[14]
Out
100
-
Low
Address Bit 14
90
VDD
Core Supply Voltage
91
GND
Core Supply Ground
92
ADDRESS[20]
Out
50
-
Low
Address Bit 20
93
VDDIO
I/O Supply Voltage
94
GNDIO
I/O Supply Ground
95
ADDRESS[19]
Out
50
-
Low
Address Bit 19
96
ADDRESS[15]
Out
100
-
Low
Address Bit 15
97
ADDRESS[18]
Out
50
-
Low
Address Bit 18
98
ADDRESS[16]
Out
100
-
Low
Address Bit 16
99
ADDRESS[17]
Out
50
-
Low
Address Bit 17
100
SCANEN
In
High
Scan enable (tie to ground)
101
ROMSN[0]
Out
50
Low
High
PROM Select 0
102
VDD
Core Supply Voltage
103
GND
Core Supply Ground
104
VDDIO
I/O Supply Voltage
105
GNDIO
I/O Supply Ground
106
ROMSN[1]
Out
50
Low
High
PROM Select 1
107
WRITEN
Out
50
Low
High
Write Strobe for PROM, I/O
108
IOSN
Out
50
Low
High
I/O Select
109
RAMSN[0]
Out
50
Low
High
SRAM Select 0
110
RAMSN[1]
Out
50
Low
High
SRAM Select 1
111
RAMOEN
Out
50
Low
High
SRAM Output Enable
112
RAMWEN
Out
50
Low
High
SRAM Write Enable
113
BRDYN
In
Low
Bus Ready
114
VDD
Core Supply Voltage
115
GND
Core Supply Ground
116
VDDIO
I/O Supply Voltage
117
GNDIO
I/O Supply Ground
118
BEXCN
In
Low
Bus Exception
119
WDOGN
Out
50
Low
High-Z
Watchdog Indicator (output is driven active low, else it
is in tri-state and therefore requires external pull-up)
120
READ
Out
50
High
High
SRAM, PROM, I/O read indicator
121
TDI
In
-
Jtag Test Data In
122
TCK
In
-
Jtag Test Clock
123
TMS
In
High
Jtag Test Mode Select
124
TDO
Out
50
-
Low
Jtag Test Data Out
Table 31. Pin assignment
Pin no.
Pin name
Dir.
Max load [pF]
Polarity
Reset value
Note



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