 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
GR712RC Datasheet(PDF) 1 Page - Aeroflex Circuit Technology |
|
|
|||||||||||||||||||||||||||||
GR712RC Datasheet(HTML) 1 Page - Aeroflex Circuit Technology |
|
|
1 / 48 page  Copyright Aeroflex Gaisler AB February 2013, Issue 2.0 Dual-Core LEON3-FT SPARC V8 Processor GR712RC Data Sheet GAISLER Description The GR712RC is an implementation of the dual-core LEON3FT SPARC V8 processor using RadSafeTM technology. The fault tolerant design of the processor in combination with the radiation tolerant technology provides total immunity to radiation effects. Specification • CQFP240 package • Total Ionizing Dose (TID) up to 300 krad(Si) • Proven Single-Event Latch-Up (SEL) immunity • Proven Single-Event Upset (SEU) tolerance • 1.8V & 3.3V supply • 15 mW/MHz processor core power consumption • 100 MHz system frequency • 200 Mbps SpaceWire links • 10 Mbps CCSDS Telecommand link • 50 Mbps CCSDS Telemetry link Features • Dual-core SPARC V8 integer unit, each with 7-stage pipeline, 8 register windows, 4x4 KiB multi- way instruction cache, 4x4 KiB multi-way data cache, branch prediction, hardware multiplier and divider, power-down mode, hardware watchpoints, single- vector trapping, SPARC reference memory management unit, etc. • Two high-performance double precision IEEE-754 floating point units • EDAC protected (8-bit BCH and 16-bit Reed- Solomon) interface to multiple 8/32-bits PROM/SRAM/SDRAM memory banks • Advanced on-chip debug support unit • 192 KiB EDAC protected on-chip memory • Multiple SpaceWire links with RMAP target • Redundant 1553 BC/RT/MT interfaces • Redundant CAN 2.0 interfaces • 10/100 Ethernet MAC with RMII interface • SPI, I2C, ASCS16 (STR), SLINK interfaces • CCSDS/ECSS Telemetry and Telecommand • UARTs, Timers & Watchdog, GPIO ports, Interrupt controllers, Status registers, JTAG, etc. • Configurable I/O switch matrix Applications GR712RC is an advanced system-on-chip, targeting high reliability rad-hard space, aeronautics and military applications. It incorporates a dual-core LEON3-FT SPARC V8 processor and is implemented using Ramon Chips’ RadSafeTM library on Tower Semiconductors’ standard 180 nm CMOS technology. |
Similar Part No. - GR712RC |
|
Similar Description - GR712RC |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
