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APL3200 Datasheet(PDF) 14 Page - Anpec Electronics Coropration |
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APL3200 Datasheet(HTML) 14 Page - Anpec Electronics Coropration |
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14 / 24 page ![]() Copyright © ANPEC Electronics Corp. Rev. A.5 - Apr., 2009 APL3200 www.anpec.com.tw 14 The enable input, EN, switches the charging of APL3200 on or off. With EN high, the APL3200 can begin charging. When EN is low, DCOK and PON remain active. Charging stops when EN is low, but the chip remains biased and continues to draw current from the input supplies. Therefore, power-monitoring outputs can remain valid. DC Power-OK ( DCOK) Function Description Autonomous Power Source Selection DC USB Description VDC>18V VUSB<6.5V VDC<18V VUSB>6.5V Exceeds operating input range. Not allowed. 4V<VDC<6.4V VUSB<6.5V DCLV supplies charging current. VDC <4V or VDC >6.4V VUSB>4V USB supplies charging current. VDC <4V or VDC >6.4V VUSB<4V No charging. The APL3200 charges a single-cell Li+ battery from either USB power sources or AC adapter sources. The APL3200 includes voltage sensing, monitoring the voltage on the DC pin, and switchover circuitry that selects the active input source to supply charging current. When both inputs are active, priority is given to the AC adapter. Table 1 describes the switchover between AC adaptor and USB power sources. When power is connected to DC, the APL3200 requires 20ms to validate the input. Consequently, charging is interrupted for 20ms until it is determined that input power is good. Also, when DC power is removed while valid USB power is present, charging is interrupted for 20ms before transferring to the USB source. An additional power selection circuit selects one of the power sources for control circutry of APL3200. The higher voltage on either DCLV or USB supplies control circutry with bias current through the selected internal MOSFET connected from DCLV or USB to BYP. BYP is the bypass connection for the APL3200’s internal power rail. Bypass to the GND with a 2.2 µF or greater capacitor to reduce voltage ripple. Enable (EN) DCOK is an active-low and open-drain output that goes low when V DC is below 6.4V and above 3.65V. DCOK can be used as a logic output or to drive an external P-channel MOSFET. This allows the charger to protect the input from over-voltage up to 18V. Charging from AC adaptor is disabled for inputs over 6.4V. An external 1k Ω pull-up resistor keeps DCOK high (external MOSFET off) until it is the certain voltage within the acceptable range. To verify that the input voltage is stable, DCOK has an internal delay of 20ms before connecting power to DCLV. DCOK remains operational when EN is low (charger off). USB Power-OK ( UOK) UOK is an active-low and open-drain output that goes low to indicate that V USB is valid (greater than 3.65V). UOK remains operational when EN is low (charger off). An external 10k Ω pullup resistor keeps UOK high until it is certain that power is within the acceptable range for 20ms. UOK can be used as a logic output, or to control a MOSFET that switches USB power directly to the system load when the APL3200 is powered from a USB source. Power On (PON) PON goes high when V DC or VUSB is within its normal operating range(3.65V<V DC<6.4V or VUSB>3.65V) to turn off the external P-channel MOSFET, disconnecting the battery from system load. Also, PON can be used as a logic output to indicate power is connected. The PON has an internal 10 Ω MOSFET for pulling up to BYP voltage and an internal 120k Ω resistor for pulling down to the GND. Precharge Current When the APL3200 is powered with a battery connected, the IC first detects if the cell voltage is ready for full charge current. If the cell voltage is less than the prequal level (3V typ.), the battery is precharged with a 50mA current until the cell reaches the proper level. The full charging current, as set by USEL or DCI, is then applied. Table 1 USB and DC Input Selection |
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