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APL3200 Datasheet(PDF) 5 Page - Anpec Electronics Coropration |
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APL3200 Datasheet(HTML) 5 Page - Anpec Electronics Coropration |
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5 / 24 page ![]() Copyright © ANPEC Electronics Corp. Rev. A.5 - Apr., 2009 APL3200 www.anpec.com.tw 5 Electrical Characteristics (Cont.) Refer to the typical application circuit. These specifications apply over V USB=VDC=VDCLV=VEN=VUSEL=5V, VBATT=4.2V and TA= -40~85°C (T J= -40~125°C), unless otherwise specified. Typical values are at TA=25°C. APL3200 Symbol Parameter Test Conditions Min. Typ. Max. Unit SOFT-START, DC OVER-VOLTAGE VOLTAGE THRESHOLD, AND REVERSE CURRENT TSS Soft-Start Interval ICHG=0A to fast-charging current 4 7 12 ms Rising DC Over-Voltage Threshold 6.2 6.4 6.6 V BATT Input Current VDCLV=VUSB=0V, VBATT=4.2V - - 8 µA BATT Shutdown Input Current VEN=0V, VDCLV and/or VUSB=5V, VBATT=4.2V - - 4 µA LOGIC INPUT/OUTPUTS AND GATE DRIVERS PON Pull-High Resistance PON pulled up to BYP - 10 - Ω PON Pull-low Resistance PON pulled to GND, VDCLV=VUSB=0V - 140 - k Ω DCOK, UOK, STAT1, STAT2 Pull-low Resistance All pins pulled to GND - 10 - Ω DCOK Off-Leakage Current VDCOK=12V, VDC=0V - - 1 µA UOK Off-Leakage Current VUOK=5V, VDC=5V - - 1 µA STAT1, STAT2 Off-Leakage Current VSTAT1,2=5V, VDC=VUSB=0V - - 1 µA EN, USEL Logic-Input High Level TJ=-40~125 °C, rising 1.6 - - V EN, USEL Logic-Input Low Level - - 0.4 V EN, USEL Input Bias Current - - 1 µA |
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