16-Bit, 400 MSPS

Digital-to-Analog Converter

AD9726

Rev. B

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FEATURES

Dynamic performance

Precision calibrated linearity

DNL ≤ ±0.5 LSB at +25°C

INL ≤ ±1.0 LSB at +25°C

LVDS inputs with internal 100 Ω terminations

Automatic data/clock timing synchronization

Single data rate or double data rate capable

Differential current outputs

Internal precision reference

Operates on 2.5 V and 3.3 V supplies

Extended industrial temperature range

Thermally enhanced, 80-lead, RoHS-compliant

TQFP_EP package

APPLICATIONS

Instrumentation

Test equipment

Waveform synthesis

Communications systems

FUNCTIONAL BLOCK DIAGRAM

INTERNAL

REFERENCE

CALIBRATION

MEMORY

LVDS OUTPUT

DRIVER

SPI

CSB

SDIO

SDO

RESET

IOUTA

IOUTB

REFIO

FSADJ

SCLK

CLK+

CLK–

DCLK_OUT+

DCLK_OUT–

DB[15]+

DB[15]–

DB[0]+

DB[0]–

DCLK_IN+

DCLK_IN–

CLOCK DISTRIBUTION

AND CONTROL

16-BIT

DAC

Figure 1.

.

GENERAL DESCRIPTION

The AD9726 is a 16-bit digital-to-analog converter (DAC)

that offers leading edge performance at conversion rates of up

to 400 MSPS. The device uses low voltage differential signaling

(LVDS) inputs and includes internal 100 Ω terminations. The

analog output can be single-ended or differential current. An

internal precision reference is included.

The AD9726 also features synchronization logic to monitor and

optimize the timing between incoming data and the sample clock.

This reduces system complexity and simplifies timing require-

ments. An LVDS clock output is also available to drive an external

data pump in either single data rate (SDR) or double data rate

(DDR) mode.

All device operation is fully programmable using the flexible

serial port interface (SPI). The AD9726 is also fully functional

in its default state for applications without a controller.

PRODUCT HIGHLIGHTS

1.

A unique combination of precision and performance

makes the AD9726 equally suited to applications with

demanding frequency domain or demanding time domain

requirements.

2.

Nonvolatile factory calibration assures a highly linear

transfer function. Internal logic offers on demand self-

calibration for linearity even at extended operating

temperatures.

3.

Proprietary architecture minimizes data dependent,

discrete mixing spurs and offers enhanced dynamic

performance over a wide range of output frequencies.

High input data rates create a very high frequency

synthesis bandwidth.

4.

The fully automatic, transparent synchronizer maintains

optimized timing between clock and data in real time and

offers programmable control options for added flexibility.

5.

Full-scale output current is external resistor programmable.