| Electronic Components Datasheet Search |
|
MP3418 Datasheet(PDF) 9 Page - Monolithic Power Systems |
|
|
|||||||||||||||||||||||||||||
MP3418 Datasheet(HTML) 9 Page - Monolithic Power Systems |
|
9 / 14 page ![]() MP3418 – 400mA, 1.2MHz, SYNCHRONOUS, STEP-UP CONVERTER WITH OUTPUT DISCONNECT MP3418 Rev 1.0 www.MonolithicPower.com 9 2/7/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. OPERATION The MP3418 is a 1.2MHz, synchronous, step- up converter housed in a compact TSOT23 package with true output disconnect. Able to operate at low-input voltages of less than 0.8V, the device features fixed-frequency current- mode PWM control for exceptional line and load regulation. Internal soft-start and loop compensation simplify the design process and minimize the external components. The internal low-RDS(ON) MOSFETs combined with Power Save Mode operation enable the device to maintain high efficiency over a wide current- load range. Synchronous Rectifier The MP3418 integrates an N-channel and a P- channel MOSFET to realize a synchronous rectifier. Replacing the traditional Schottky diode with a low-RDS(ON) PMOS improves efficiency. In a conventional synchronous rectifier, the PMOS body diode is forward- biased, and the current flows from VIN to VOUT. The MP3418 allows for true output disconnect by eliminating the body diode, and prevents battery depletion when the converter shuts down. To prevent excessive inductor current, the PMOS synchronous rectifier only functions when VOUT > (VIN +200mV). Start-Up When EN is on, the MP3418 starts up with a linear charge period. During this linear charge period, the rectifier PMOS turns on until the output capacitor charges to VIN–200mV; the PMOS current is limited during this period to around 200mA to avoid inrush current. This circuit also helps to limit the output current under short circuit conditions. After the linear charging period, the device starts switching. If VOUT remains below 1.7V, the part then works in free-running mode; in this mode, the device works in open loop first at a variable frequency then at a fixed 500kHz switching frequency, the duty cycle depends on the input-output ratio, and the switching current is limited to 400mA to avoid the start-up current inrush. The internal soft-start (SS) does not take charge and continues to rise following the FB voltage during the linear charging and free- running period. Once the output voltage reaches 1.7V, the normal closed-loop operation initiates, VOUT starts to rise under the control of SS. It then works either in boost mode or down mode depending on VIN and VOUT. Table 1 lists the operation modes during start up. Table 1: Operation Mode during Start-Up Sequence VOUT <Vin-200mV & VOUT <1.7V Linear Charge VOUT ≥Vin-200mV & VOUT <1.7V Free Running VOUT <Vin+200mV & VOUT ≥1.7V Down mode VOUT >Vin+200mV & VOUT ≥1.7V Boost Mode In normal mode, when VOUT>VIN+200mV, the MP3418 powers itself from VOUT instead of VIN. This allows the battery voltage to drop to as low as 0.6V without affecting the circuit operation. The battery supplies sufficient energy to the output and becomes the only limiting factor in the application. Device Enable The device operates when EN is high (>0.7V). It enters shutdown mode when EN is set to low (<0.1V). In shutdown mode, the regulator stops switching and halts all internal control circuitry and eliminate body-diode conduction of the internal PMOS rectifier. This isolates the load from the input, and means that the output voltage can drop below the input voltage during shutdown. Power-Save Mode The MP3418 automatically enters power-save mode (PSM) when the load decreases, and resumes PWM mode when the load increases. In PSM, the converter only operates when the output voltage falls below the set threshold, and ramps up by several pulses with the same switching frequency as PWM mode. It resumes power-save mode once the output voltage exceeds the high threshold. PSM requires fewer circuit resources than PWM mode. All unused circuitry is disabled, so as to reduce quiescent power dissipation as well as switching power loss. The OUT pin voltage- |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |