AM79C975VCW datasheet(189/304 Pages) AMD

189 / 304 page

Am79C973/Am79C975

189

P R E L I M INARY

Read

accessible

always.

D1_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit.

7-0

DATA1

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA1

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP

bit.

BCR39: PCI DATA Register Two (DATA2) Alias

Note: This register is an alias of the DATA register and

also of the DATA_SCALE field of the PMCSR register.

Since these two are read only, BCR39 provides a

means of programming them through the EEPROM.

The contents of this register are copied into the corre-

sponding fields pointed with the DATA_SEL field set to

two. Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

15-10 RES

Reserved locations. Written as

zeros and read as undefined.

9-8

D2_SCALE

These bits correspond to the

DATA_SCALE

field

the

PMCSR (offset Register 44 of the

PCI configuration space, bits 14-

13). Refer to the description of

DATA_SCALE for the meaning of

this field.

Read

accessible

always.

D2_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit.

7-0

DATA2

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA2

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP bit

BCR40: PCI DATA Register Three (DATA3) Alias

Note: This register is an alias of the DATA register and

also of the DATA_SCALE field of the PCMCR register.

Since these two are read only, BCR40 provides a

means of programming them through the EEPROM.

The contents of this register are copied into the corre-

sponding fields pointed with the DATA_SEL field set to

three. Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

15-10 RES

Reserved locations. Written as

zeros and read as undefined.

9-8

D3_SCALE

These bits correspond to the

DATA_SCALE field of the PMC-

SR (offset Register 44 of the PCI

configuration space, bits 14-13).

Refer

the

description

DATA_SCALE for the meaning of

this field.

Read

accessible

always.

D3_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit.

7-0

DATA3

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA3

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP

bit.

BCR41: PCI DATA Register Four (DATA4) Alias

Note: This register is an alias of the DATA register and

also of the DATA_SCALE field of the PCMCR register.

Since these two are read only, BCR41 provides a

means of programming them through the EEPROM.

The contents of this register are copied into the corre-

sponding fields pointed with the DATA_SEL field set to

four. Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

AM79C975VCW Datasheet(PDF) 189 Page - Advanced Micro Devices

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