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PCI2060 Datasheet(PDF) 39 Page - Texas Instruments

Part # PCI2060
Description  PCI2060 Asynchronous PCI-to-PCI
PDF  76 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCI2060 Datasheet(HTML) 39 Page - Texas Instruments

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Principles of Operation
31
April 2005
SCPS096A
Table 3−14. JTAG Instructions and Op Codes
INSTRUCTION
OP CODE
DESCRIPTION
EXTEST
00000
Drives terminals from the boundary scan register
SAMPLE
00001
Samples I/O terminals
CLAMP
00100
Drives terminals from the boundary scan register and selects the bypass register for shifts.
HIGHZ
00101
Puts all outputs and I/O terminals except for the TDO terminal into a high-impedance state.
BYPASS
11111
Selects the bypass register for shifts
3.13.3
1-Bit Bypass Register
The 1-bit bypass register is a 1-bit shift register that provides a means for effectively bypassing the JTAG test
logic through a single-bit serial connection through the chip from TDI to TDO. At board-level testing, this helps
reduce overall length of the scan ring.
3.13.4
Boundary Scan Register
The boundary-scan register is a single-shift register-based path formed by boundary-scan cells placed at the
chip’s signal terminals. The register is accessed through the JTAG port’s TDI and TDO terminals.
3.13.4.1 Boundary-Scan Register Cells
Each boundary-scan cell operates in conjunction with the current instruction and the current state in the test
access port controller state machine. The function of the boundary-scan register cells is determined by the
associated terminals, as follows:
•
Input-only terminals—The boundary-scan cell is basically a 1-bit shift register. The cell supports sample
and shift functions.
•
Output-only terminals—The boundary-scan cell comprises a 1-bit shift register and an output multiplexer.
The cell supports the sample, shift, and drive output functions.
•
Bidirectional terminals—The boundary-scan cell is identical to the output-only terminal cell, but it captures
test data from the incoming data line. The cell supports sample, shift, drive output, and hold output
functions. It is used at all I/O terminals.
The information in Table 3−15 is for implementation of boundary scan interface signals to permit in-circuit
testing.



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