AT89 datasheet(18/41 Pages) ATMEL

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AT89S8252

0401F–MICRO–11/03

UART

The UART in the AT89S8252 operates the same way as the UART in the AT89C51 and

AT89C52. For further information on the UART operation, refer to the Atmel web site

(http://www.atmel.com). From the home page, select “Products”, then “Microcontrollers,

then “8051-Architecture”. Click on “Documentation”, then on “Other Documents”. Open

the document “AT89 Series Hardware Description”.

Serial Peripheral

Interface

The serial peripheral interface (SPI) allows high-speed synchronous data transfer

between the AT89S8252 and peripheral devices or between several AT89S8252

devices. The AT89S8252 SPI features include the following:

•

Full-Duplex, 3-Wire Synchronous Data Transfer

•

Master or Slave Operation

•

1.5 MHz Bit Frequency (max.)

•

LSB First or MSB First Data Transfer

•

Four Programmable Bit Rates

•

End of Transmission Interrupt Flag

•

Write Collision Flag Protection

•

Wakeup from Idle Mode (Slave Mode Only)

The interconnection between master and slave CPUs with SPI is shown in the following

figure. The SCK pin is the clock output in the master mode but is the clock input in the

slave mode. Writing to the SPI data register of the master CPU starts the SPI clock gen-

erator, and the data written shifts out of the MOSI pin and into the MOSI pin of the slave

CPU. After shifting one byte, the SPI clock generator stops, setting the end of transmis-

sion flag (SPIF). If both the SPI interrupt enable bit (SPIE) and the serial port interrupt

enable bit (ES) are set, an interrupt is requested.

The Slave Select input, SS/P1.4, is set low to select an individual SPI device as a slave.

When SS/P1.4 is set high, the SPI port is deactivated and the MOSI/P1.5 pin can be

used as an input.

There are four combinations of SCK phase and polarity with respect to serial data,

which are determined by control bits CPHA and CPOL. The SPI data transfer formats

are shown in Figure 8 and Figure 9.

Figure 7. SPI Master-slave Interconnection

8-BIT SHIFT REGISTER

MASTER

CLOCK GENERATOR

SPI

MISO

8-BIT SHIFT REGISTER

SLAVE

MISO

MOSI MOSI

SCK

MSB

LSB

MSB

LSB

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