AT89 datasheet(5/41 Pages) ATMEL

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AT89S8252

0401F–MICRO–11/03

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device.

ALE/PROG

Address Latch Enable is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during

Flash programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and

may be used for external timing or clocking purposes. Note, however, that one ALE

pulse is skipped during each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the

bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is

weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in

external execution mode.

PSEN

Program Store Enable is the read strobe to external program memory.

When the AT89S8252 is executing code from external program memory, PSEN is acti-

vated twice each machine cycle, except that two PSEN activations are skipped during

each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to

fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to V

CC for internal program executions. This pin also receives the

12-volt programming enable voltage (V

PP) during Flash programming when 12-volt pro-

gramming is selected.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Port Pin

Alternate Functions

P3.0

RXD (serial input port)

P3.1

TXD (serial output port)

P3.2

INT0 (external interrupt 0)

P3.3

INT1 (external interrupt 1)

P3.4

T0 (timer 0 external input)

P3.5

T1 (timer 1 external input)

P3.6

WR (external data memory write strobe)

P3.7

RD (external data memory read strobe)

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