AT89 datasheet(4/41 Pages) ATMEL

4 / 41 page

AT89S8252

0401F–MICRO–11/03

Some Port 1 pins provide additional functions. P1.0 and P1.1 can be configured to be

the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input

(P1.1/T2EX), respectively.

Furthermore, P1.4, P1.5, P1.6, and P1.7 can be configured as the SPI slave port select,

data input/output and shift clock input/output pins as shown in the following table.

Port 1 also receives the low-order address bytes during Flash programming and

verification.

Port 2

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers

can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are exter-

nally being pulled low will source current (I

IL) because of the internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program memory

and during accesses to external data memory that use 16-bit addresses (MOVX @

DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During

accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits

the contents of the P2 Special Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash

programming and verification.

Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers

can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are exter-

nally being pulled low will source current (I

IL) because of the pull-ups.

Port 3 receives some control signals for Flash programming and verification.

Port 3 also serves the functions of various special features of the AT89S8252, as shown

in the following table.

Port Pin

Alternate Functions

P1.0

T2 (external count input to Timer/Counter 2), clock-out

P1.1

T2EX (Timer/Counter 2 capture/reload trigger and direction control)

P1.4

SS (Slave port select input)

P1.5

MOSI (Master data output, slave data input pin for SPI channel)

P1.6

MISO (Master data input, slave data output pin for SPI channel)

P1.7

SCK (Master clock output, slave clock input pin for SPI channel)

AT89 Datasheet(PDF) 4 Page - ATMEL Corporation

AT89 Datasheet(HTML) 4 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL