FEDL9472-02

LAPIS Semiconductor

ML9472

4/18

PIN DESCRIPTION

Symbol

Type

Description

OSC_IN

OSC_OUT

OSC_OUT

I

O

O

Pins for oscillation. The oscillator circuit is configured by externally connecting two

resistors and a capacitor. Make the wiring length as short as possible, because the

resistor connected to the OSC_IN pin has a higher value and the circuit is susceptible to

external noise.

DATA_IN

I

Serial data input pin. The display goes on when input data is at a “H” level, and it goes

off when input data is at a “L” level.

CLOCK

I

Shift clock input pin. Data from the DATA pin is transferred in synchronization with the

rising edge of the shift clock.

LOAD

I

Load signal input pin. Serially input data is transferred to the 60-bit latch at a “H” level of

this load signal, then held at a “L” level.

BLANK

l

Input pin that turns off all segments. The entire display goes off when a “L” level is

applied to this pin. The display returns to the previous state when a “H” level is applied.

When SEG_TEST pin is at a “H” level, the input on this pin is disabled.

SEG_TEST

l

on when “H” is applied to this pin. The display returns to the previous state when a “L”

level is applied. When this pin is at a “H” level, the input on the BLANK pin is disabled.

D/S

l

When “H” is applied to this pin, the ML9472 operates in the 1/2 duty dynamic display

mode. When this pin is set at a “L” level, the ML9472 operates in the static display

mode.

EXT/INT

I

When the external common signal is used, fix this pin at a “H” level and input the

external common signal from the OSC_IN pin. The input common signal is used as the

internal common signal and is output from the COM_OUT pin through the buffer. When

the built-in common signal generator is used, fix this pin at a “L” level. When the

ML9472 is used as an output expander, fix this pin at a “H” level and the OSC_IN pin at

a “L” level. The output logic can be reversed with respect to the input data by setting

OSC_IN to a “H” level.

SYNC

I/O

This pin is an input/output pin which is used when two or more ML9472s are connected

in series (cascade connection) in the 1/2 duty dynamic display mode. All of the involved

ML9472’s SYNC pins should be connected by the common line and they should be

pulled up with a common resistor, which makes a phase level of all involved ML9472’s

COM_A and COM_B pins equal. When a single ML9472 is used in the dynamic display

mode, SYNC should be pulled up with a resistor.

Connect this pin to GND if any of the following conditions is true:

- The ML9472 is operated in the static display mode.

- The ML9472 is used as an output expander.

DATA_OUT1

O

The 60

When two or more ML9472s are connected in series (cascade connection) in the static

display mode, this pin should be connected to the next ML9472’s DATA_IN Pin.

DATA_OUT2

O

The 120

When two or more ML9472s are connected in series (cascade connection) in the 1/2

duty dynamic display mode, this pin should be connected to the next ML9472’s

DATA_IN pin.

COM_OUT

O

When tow or more ML9472s are connected in series (cascade connection), this pin

should be connected with all of the slave ML9472’s OSC_IN pins.