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RL78G13 Datasheet(PDF) 25 Page - Renesas Technology Corp |
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RL78G13 Datasheet(HTML) 25 Page - Renesas Technology Corp |
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25 / 46 page ![]() RL78/G13 Serial Array Unit (UART Communication) R01AN0459EJ0200 Rev. 2.00 Page 25 of 43 2014.03.24 Serial communication operation setting register 01 (SCR01) Data length setting, data transfer order, error interrupt signal mask availability, and operation mode Reception channel communication operation setting Symbol: SCR01 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 TXE 01 RXE 01 DAP 01 CKP 01 0 EOC 01 PTC 011 PTC 010 DIR 01 0 SLC 011 SLC 010 0 1 DLS 011 DLS 010 0 1 0 0 0 1 1 0 1 0 0 1 0 1 1 1 Bits 15 and 14 TXE01 RXE01 Channel 1 operation mode setting 0 0 Communication prohibited 0 1 Reception only 1 0 Transmission only 1 1 Both transmission and reception For UART reception, wait for 4 fCLK clock cycles or more before setting SS01 to 1, after setting the RXE01 bit of the SCR01 register to 1. Bit 10 EOC01 Error interrupt signal (INTSRE1) mask availability selection 0 Error interrupt INTSRE1 is masked 1 Generation of error interrupt INTSRE1 is enabled Bits 9 and 8 PTC011 PTC010 Parity bit setting in UART mode Transmission Reception 0 0 No parity bit is output Data is received without parity 0 1 0 parity is output No parity check is made 1 0 Even parity is output Check is made for even parity 1 1 Odd parity is output Check is made for odd parity Bit 7 DIR01 Selection of data transfer order in CSI and UART modes 0 Input and output in MSB first 1 Input and output in LSB first Bits 5 and 4 SLC011 SLC010 Stop bit setting in UART mode 0 0 No stop bit 0 1 Stop bit length = 1 bit 1 0 Stop bit length = 2 bits 1 1 Setting prohibited Caution: For details on the register setup procedures, refer to RL78/G13 User's Manual: Hardware. |
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