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CS4215 Datasheet(PDF) 8 Page - Cirrus Logic |
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CS4215 Datasheet(HTML) 8 Page - Cirrus Logic |
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8 / 52 page ![]() FUNCTIONAL DESCRIPTION Overview The CS4215 has two channels of 16-bit analog- to-digital conversion and two channels of 16-bit digital-to-analog conversion. Both the ADCs and the DACs are delta-sigma converters. The ADC inputs have adjustable input gain, while the DAC outputs have adjustable output attenuation. Spe- cial features include a separate microphone input with a 20 dB programmable gain block, an op- tional 8-bit µ-law or A-law encoder/decoder, pins for two crystals to set alternative sample rates, direct headphone drive and mono speaker drive. Control for the functions available on the CS4215, as well as the audio data, are communi- cated to the device over a serial interface. Separate pins for input and output data are pro- vided, allowing concurrent writing to and reading from the device. Data must be con- tinually written for proper operation. Multiple CS4215 devices may be attached to the same data lines. Analog Inputs Figure 1, the recommended connection diagram, shows examples of the external analog circuitry recommended around the CS4215. An internal multiplexer selects between line level inputs and microphone level inputs. Input filters using a 150 Ω resistor and a .01 µF NPO capacitor to ground are required to isolate the input op-amps from, and provide a charge re- serve for, the switched-capacitor input of the codec. The RC values may be safely changed by a factor of two. The HPF bit in Control Time Slot 2 provides a high pass filter that will reduce DC offset on the analog inputs. Using the high pass filter will cause slight distortions at very low frequencies. Unused analog inputs that are not selected have a very high input impedance, so they may be tied to AGND directly. Unused analog inputs that are selected should be tied to AGND through a 0.1uF capacitor. This prevents any DC current flow. Line Level Inputs LINL and LINR are the line level input pins. These pins are internally biased to the CMOUT voltage. Figure 2 shows a dual op-amp buffer which combines level shifting with a gain of 0.5 to attenuate the standard line level of 2 Vrms to LINR (pin 16) LINL (pin 18) Line In Right Line In Left 0.01 uF NPO 0.01 uF NPO 150 150 0.47 uF 0.47 uF Figure 3. AC Coupled Input. + _ 56 pF 10 k 20 k + _ 10 k 56 pF 5 k 20 k Line In Line In Right Left CMOUT LINR LINL Op-amps are run from VA1, VA2 and AGND. 0.47 uF 0.47 uF 150 0.01 uF NPO 0.47 uF 0.01 uF NPO 150 0.47 uF (pin 16) (pin 18) (pin 19) Example Op-Amps are LT1013 Figure 2. DC Coupled Input. CS4215 8 DS76F2 |
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