CS4215 datasheet(21/52 Pages) CIRRUS

21 / 52 page

DATA MODE

The data mode is used during conversions to

pass digital data between the CS4215 and exter-

nal devices. The frame sync rate is equal to the

value of the conversion frequency set by the

DFR2-DFR0 bits of the Data Format register.

Each frame has either 64, 128, or 256 bit times

depending on the BSEL bits in the Serial Con-

trol register. Control of gain, attenuation, input

selection and output muting are embedded in the

data stream.

Data Formats

All time slots contain 8 bits. The MSB of the

data is transmitted/received first. The CS4215

data registers have the functions and time slot as-

signments shown in Table 2. The register address

is the time slot number when D/C is 1. The

SDOUT pin goes into a high-impedance state

prior to time slot 1 and after Time Slot 8 (see

Figure 12).

The CS4215 supports four audio data formats:

16-bit 2’s-complement linear, 8-bit unsigned lin-

ear, 8-bit A-Law, and 8-bit

µ-Law. Figure 13

illustrates the transfer characteristic for 16-bit

and 8-bit linear formats. Note that a digital code

SCLK

128

65 66

TSOUT B

SDIN

D/C

Data to A

Data to B

Data to A

67 68

FSYNC,

TSIN A

TSOUT A,

TSIN B

128

Data from A

Data from B

Data from A

SDOUT

Data Mode

Figure 12. Data Mode Timing for 2 CS4215’s

+FS

-FS

128

191

255

DIGITAL CODE

8-bit

unsigned:

16-bit

2’s comp:

-32768

-16384

16384

32767

Figure 13. Linear Data Formats

Time slot

Description

Left Audio MS8 bits

Left Audio LS8 bits

Right Audio MS8 bits

Right Audio LS8 bits

Output Setting

Input Setting

Table 2. Data Registers

CS4215

DS76F2

CS4215 Datasheet(PDF) 21 Page - Cirrus Logic

CS4215 Datasheet(HTML) 21 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL