AT45DB021D_13 datasheet(10/48 Pages) ETC2

10 / 48 page

3638M–DFLASH–5/2013

AT45DB021D

5.8

Main Memory Page Program Through Buffer

This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase

operations. Data is first clocked into the buffer from the input pin (SI) and then programmed into a specified page in

the main memory. To perform a main memory page program through buffer for the DataFlash standard page size

(264-bytes), a 1-byte opcode, 82H, must first be clocked into the device, followed by three address bytes. The

address bytes are comprised of five don’t care bits, 10 page address bits, (PA9 - PA0) that select the page in the

main memory where data is to be written, and nine buffer address bits (BFA8 - BFA0) that select the first byte in

the buffer to be written. To perform a main memory page program through buffer for the binary page size (256-

bytes), the opcode 82H must be clocked into the device followed by three address bytes consisting of six don’t care

bits, 10 page address bits (A17 - A8) that specify the page in the main memory to be written, and eight buffer

address bits (BFA7 - BFA0) that selects the first byte in the buffer to be written. After all address bytes are clocked

in, the part will take data from the input pins and store it in the specified data buffer. If the end of the buffer is

reached, the device will wrap around back to the beginning of the buffer. When there is a low-to-high transition on

the CS pin, the part will first erase the selected page in main memory to all ones and then program the data stored

in the buffer into that memory page. Both the erase and the programming of the page are internally self-timed and

should take place in a maximum time of tEP. During this time, the status register will indicate that the part is busy.

Sector Protection

Two protection methods, hardware and software controlled, are provided for protection against inadvertent or

erroneous program and erase cycles. The software controlled method relies on the use of software commands to

enable and disable sector protection while the hardware controlled method employs the use of the Write Protect

(WP) pin. The selection of which sectors that are to be protected or unprotected against program and erase

operations is specified in the nonvolatile Sector Protection Register. The status of whether or not sector protection

has been enabled or disabled by either the software or the hardware controlled methods can be determined by

checking the Status Register.

6.1

Software Sector Protection

6.1.1

Enable Sector Protection Command

Sectors specified for protection in the Sector Protection Register can be protected from program and erase

operations by issuing the Enable Sector Protection command. To enable the sector protection using the software

controlled method, the CS pin must first be asserted as it would be with any other command. Once the CS pin has

been asserted, the appropriate 4-byte command sequence must be clocked in via the input pin (SI). After the last

bit of the command sequence has been clocked in, the CS pin must be deasserted after which the sector

protection will be enabled.

Table 6-1.

Enable Sector Protection Command

Figure 6-1.

Enable Sector Protection

Command

Byte 1

Byte 2

Byte 3

Byte 4

Enable Sector Protection

3DH

2AH

7FH

A9H

Opcode

Byte 1

Opcode

Byte 2

Opcode

Byte 3

Opcode

Byte 4

Each transition

represents 8 bits

AT45DB021D Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers

AT45DB021D Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL