DS2182A

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ALARM OUTPUTS

The transceiver also provides direct alarm outputs for applications when additional decoding and

demuxing are required to supplement the onboard alarm logic.

RLOS OUTPUT

The receive loss of sync output indicates the status of the receiver synchronizer circuitry; when high, an

off-line resynchronization is in progress and a high-low transition indicates that resync is complete. The

RLOS bit (RSR1.3) is a latched version of the RLOS output. If the auto-resync mode is selected (RCR1.1

= 0), RLOS is a real-time indication of a carrier loss or OOF event occurrence.

RYEL OUTPUT

The yellow alarm output transitions high when a yellow alarm is detected. A high-low transition indicates

the alarm condition has been cleared. The RYEL bit (RSR1.4) is a latched version of the RYEL output.

RBV OUTPUT

The bipolar violation output transitions high when the accused bit emerges at RSER. RBV goes low at the

next bit time if no additional violations are detected.

RFER OUTPUT

The receive frame error output transitions high at the F-bit time and is held high for 2 bit periods when a

frame bit error occurs. In 193S, framing FT and FS patterns are tested. The FPS pattern is tested in 193E

framing.

Additionally, in 193E framing, RFER reports CRC6 code word errors by a low-high-low

transition (1 bit period-wide) one-half RCLK period before a low-high transition on RMSYNC (see

Figure 17).

RESET

RST

must be held low on system power-up to insure proper initialization of the counters and registers.

Following reset, the host processor should restore all control modes by writing appropriate registers with

control data.

ALARM OUTPUT TIMING Figure 17