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LMH7322 Datasheet(PDF) 13 Page - Texas Instruments

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Part # LMH7322
Description  Dual 700 ps High Speed Comparator with RSPECL Outputs
PDF  33 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMH7322 Datasheet(HTML) 13 Page - Texas Instruments

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LMH7322
www.ti.com
SNOSAU8H – MARCH 2007 – REVISED MAY 2011
Table 1. Definitions (continued)
Symbol
Text
Description
Hyst
Hysteresis
Difference between the switching point ‘0’ to ‘1’ and vice versa.
IB-LE
Latch Enable Bias Current
Current flowing in or out of the input pins, when both are biased at normal PECL
levels.
IOS-LE
Latch Enable Offset Current
Difference between the input bias current of the LE and LE pin.
TC IOS-LE
Temp Coefficient Latch Enable Offset
Temperature coefficient of IOS-LE.
Current
VOS-LE
Latch Enable Offset Voltage
Voltage difference needed between LE and LE to place the part in the latched or
the transparent state.
TC VOS-LE
Temp Coefficient Latch Enable Offset
Temperature coefficient of VOS-LE.
Voltage
VRI-LE
Latch Enable Voltage Range
Voltage which can be applied to the LE input pins without damaging the device.
VRID-LE
Latch Enable Differential Voltage Range
Differential Voltage between LE and LE at which the clamp isn’t working. The
difference can be as high as the supply voltage but excessive input currents are
flowing through the clamp diodes and protection resistors.
VOH
Output Voltage High
High state single ended output voltage (Q or Q) (see Figure 34).
VOL
Output Voltage Low
Low state single ended output voltage (Q or Q) (see Figure 34).
VOD
average of VODH and VODL
(VODH + VODL)/2.
IVCCI
Supply Current Input Stage
Supply current into the input stage.
IVCCO
Supply Current Output Stage
Supply current into the output stage while current through the load resistors is
excluded.
IVEE
Supply Current VEE pin
Current flowing to the negative supply pin.
TR
Maximum Toggle Rate
Maximum frequency at which the outputs can toggle between the nominal VOH
and VOL.
PW
Pulse Width
Time from 50% of the rising edge of a signal to 50% of the falling edge.
tPDH resp tPDL Propagation Delay
Delay time between the moment the input signal crosses the switching level L to
H and the moment the output signal crosses 50% of the rising edge of Q output
(tPDH), or delay time between the moment the input signal crosses the switching
level H to L and the moment the output signal crosses 50% of the falling edge of
Q output (tPDL).
tPDL resp tPDH
Delay time between the moment the input signal crosses the switching level L to
H and the moment the output signal crosses 50% of the falling edge of Q output
(tPDL), or delay time between the moment the input signal crosses the switching
level H to L and the moment the output signal crosses 50% of the rising edge of
Q output (tPDH).
tPDLH
Average of tPDH and tPDL.
tPDHL
Average of tPDL and tPDH.
tPD
Average of tPDLH and tPDHL.
tPDHd resp
Delay time between the moment the input signal crosses the switching level L to
tPDLd
H and the zero crossing of the rising edge of the differential output signal (tPDHd),
or delay time between the moment the input signal crosses the switching level H
to L and the zero crossing of the falling edge of the differential output signal
(tPDLd).
tOD-disp
Input Overdrive Dispersion
Change in tPD for different overdrive voltages at the input pins.
tSR-disp
Input Slew Rate Dispersion
Change in tPD for different slew rates at the input pins.
tCM-disp
Input Common Mode Dispersion
Change in tPD for different common mode voltages at the input pins.
ΔtPDLH resp
Q to Q Time Skew
Time skew between 50% levels of the rising edge of Q output and the falling
ΔtPDHL
edge of output (
ΔtPDLH), or time skew between 50% levels of falling edge of Q
output and rising edge of Q output (
ΔtPDHL).
ΔtPD
Average Q to Q Time Skew
Average of tPDLH and tPDHL for L to H and H to L transients.
ΔtPDd
Average Diff. Time Skew
Average of tPDHd and tPDLd for L to H and H to L transients.
tr / trd
Output Rise Time (20% - 80%)
Time needed for the (single ended or differential) output voltage to change from
20% of its nominal value to 80%.
tf / tfd
Output Fall Time (20% - 80%)
Time needed for the (single ended or differential) output voltage to change from
80% of its nominal value to 20%.
tsLE
Latch Setup Time
Time the input signal has to be stable before enabling the latch functionality.
Copyright © 2007–2011, Texas Instruments Incorporated
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