CLC021

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SNLS068H – MAY 2000 – REVISED APRIL 2013

MEASURING JITTER

The test method used to obtain the timing jitter value given in the AC Electrical Specification table is based on

procedures and equipment described in SMPTE RP 192-1996. The recommended practice discusses several

methods and indicator devices. An FFT method performed by standard video test equipment was used to obtain

the data given in this data sheet. As such, the jitter characteristics (or jitter floor) of the measurement equipment,

particularly the measurement analyzer, become integral to the resulting jitter value. The method and equipment

were chosen so that the test can be easily duplicated by the design engineer using most standard digital video

test equipment. In so doing, similar results should be achieved. The intrinsic jitter floor of the CLC021's PLL is

approximately 25% of the typical jitter given in the electrical specifications. In production, device jitter is

measured on automatic IC test equipment (ATE) using a different method compatible with that equipment. Jitter

measured using this ATE yields values approximately 50% of those obtained using the video test equipment.

The jitter test setup used to obtain values quoted in the data sheet consists of:

•

Texas Instruments SD021-5EVK (SD021-3EVK), CLC021 evaluation kit

•

Tektronix TG2000 signal generation platform with DVG1 option

•

Tektronix VM700T Option 1S Video Measurement Set

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Tektronix TDS 794D, Option C2 oscilloscope

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Tektronix P6339A passive probe

•

75

Ω coaxial cable, 3 ft., Belden 8281 or RG59 (2 required)

•

ECL-to-TTL/CMOS level converter/amplifier see Figure 12.

Apply the black-burst reference clock from the TG2000 signal generator's BG1 module 27 MHz clock output to

the level converter input. The clock amplitude converter schematic is shown in Figure 12. Adjust the input bias

control to give a 50% duty cycle output as measured on the oscilloscope/probe system. Connect the level

SD021EVK to operate in the NTSC colour bars, BIST mode. Configure the VM700T to make the jitter

measurement in the jitter FFT mode at the frame rate with 1 kHz filter bandwidth and Hanning window. Configure

the setup as shown in Figure 11. Switch the test equipment on (from standby mode) and allow all equipment

temperatures stabilize per manufacturer's recommendation. Measure the jitter value after allowing the

instrument's reading to stabilize (about 1 minute). Consult the VM700T Video Measurement Set Option 1S Serial

Digital Measurements User Manual (document number 071-0074-00) for details of equipment operation.

The VM700T measurement system's jitter floor specification at 270 Mbps is given as 200 ps ±20% (100 ps ±5%

typical) of actual components from 50 Hz to 1 MHz and 200 ps +60%, -30% of actual components from 1 MHz to

10 MHz. To obtain the actual residual jitter of the CLC021, a root-sum-square adjustment of the jitter reading

must be made to compensate for the measurement system's jitter floor specification. For example, if the jitter

the reading as given above apply.

Figure 11. Jitter Test Circuit

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