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LM3203 Datasheet(PDF) 17 Page - Texas Instruments

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Part # LM3203
Description  Step-Down DC-DC Converter with Bypass Mode for CDMA / WCDMA RF Power Amplifiers
PDF  23 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM3203 Datasheet(HTML) 17 Page - Texas Instruments

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LM3203
www.ti.com
SNVS355C – MAY 2005 – REVISED JULY 2005
approximately 6 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal
width. The important criterion is symmetry. This ensures the solder bumps on the LM3203 re-flow evenly and that
the device solders level to the board. In particular, special attention must be paid to the pads for bumps B3, C3
and D3. Because PGND and PVIN are typically connected to large copper planes, inadequate thermal relief can
result in inadequate re-flow of these bumps.
The Micro SMD package is optimized for the smallest possible size in applications with red or infrared opaque
cases. Because the Micro SMD package lacks the plastic encapsulation characteristic of larger devices, it is
vulnerable to light. Backside metalization and/or epoxy coating, along with front-side shading by the printed
circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, Micro SMD
devices are sensitive to light, in the red and infrared range, shining on the package’s exposed die edges.
Do not use or power-up the LM3203 while subjecting it to high intensity red or infrared light; otherwise degraded,
unpredictable or erratic operation may result. Examples of light sources with high red or infrared content include
the sun and halogen lamps. Place the device in a case opaque to red or infrared light.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces. These can send erroneous signals to the DC-DC converter, resulting in poor regulation or
instability. Poor layout can also result in re-flow problems leading to poor solder joints between the Micro SMD
package and board pads. Poor solder joints can result in erratic or degraded performance. Good layout for the
LM3203 can be implemented by following a few simple design rules.
1. Place the LM3203 on 10.82 mil pads. As a thermal relief, connect to each pad with a 7 mil wide,
approximately 7 mil long traces, and when incrementally increase each trace to its optimal width. The
important criterion is symmetry to ensure the solder bumps on the LM3203 re-flow evenly (see Micro SMD
Package Assembly and Use).
2. Place the LM3203, inductor and filter capacitors close together and make the trace short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
reduces radiated noise. Place the capacitors and inductor close to the LM3203. The input capacitor should
be placed right next to the device between PVIN and PGND pin.
3. Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor, through the LM3203 and inductor to the output filter
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled
up from ground, through the LM3203 by the inductor, to the output filter capacitor and then back through
ground, forming a second current loop. Routing these loops so the current curls in the same direction,
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
4. Connect the ground pins of the LM3203, and filter capacitors together using generous component side
copper fill as a pseudo-ground plane. Then connect this to the ground-plane (if one is used) with several
vias. This reduces ground plane noise by preventing the switching currents from circulating through the
ground plane. It also reduces ground bounce at the LM3203 by giving it a low impedance ground connection.
5. Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
6. Route noise sensitive traces, such as the voltage feedback trace, away from noisy traces and components.
The voltage feedback trace must remain close to the LM3203 circuit and should be routed directly from FB
pin to VOUT at the output capacitor. A good approach is to route the feedback trace on another layer and to
have a ground plane between the top layer and the layer on which the feedback trace is routed. This reduces
EMI radiation on to the DC-DC converter’s own voltage feedback trace.
7. It is recommended to connect BYPOUT pin to VOUT at the output capacitor using a separate trace, instead of
connecting it directly to the FB pin for better noise immunity.
Copyright © 2005, Texas Instruments Incorporated
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