AD9629

Rev. 0 | Page 13 of 32

AD9629-65

AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, 50% duty

cycle clock, unless otherwise noted.

0

–15

–30

–45

–60

–75

–90

–105

–120

–135

3

0

6

9

1215

182124

30

27

33

FREQUENCY (MHz)

6

+2

5

4

3

65MSPS

9.7MHz @ –1dBFS

SNR =70.3 (71.3dBFS)

SFDR = 94.2dBc

0

–15

–30

–45

–60

–75

–90

–105

–120

–135

3

0

6

9

1215

182124

30

27

33

FREQUENCY (MHz)

6

4

3

5

+

2

65MSPS

69MHz @ –1dBFS

SNR = 69.9dB (70.9dBFS)

SFDR = 92.0dBc

0

–15

–30

–45

–60

–75

–90

–105

–120

–135

3

0

6

9

1215

182124

30

27

33

FREQUENCY (MHz)

+

2

5

4

3

6

65MSPS

30.6MHz @ –1dBFS

SNR = 70.2dB (71.2dBFS)

SFDR = 94.1dBc

0

20

40

60

80

100

120

–70

–60

–50

–40

–30

–20

–10

0

INPUT AMPLITUDE (dBc)

SNR

SNRFS

SFDR

SFDRFS

0

10

20

30

40

50

60

70

80

90

100

0

50

100

150

200

INPUT FREQUENCY (MHz)

SNR

SFDR

Figure 19. AD9629-65 SNR/SFDR vs. Input Frequency (AIN) with

2 V p-p Full Scale