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HT9580 Datasheet(PDF) 15 Page - Holtek Semiconductor Inc |
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HT9580 Datasheet(HTML) 15 Page - Holtek Semiconductor Inc |
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15 / 63 page ![]() HT9580 15 April 28, 2000 Preliminary IR Q TM 0 I M S K TM 1I M S K TM 0 O V F G TM 1O V FG ti m e r 0 ov er f l ow S ti m e r 1 ov er f l ow S ti m e r 0 ov er f l ow S ti m e r 1 ov er f l ow S ti m e r 0 ov er f l ow S ti m e r 0 ov er f l ow S ti m e M a s k ed by TM 1O V FG M a s k ed by TM 0 I M S K M a s k ed by TM 0 O V F G C l e a r e d b y so f t w a r e C l e a r e d b y so f t w a r e C l e a r e d b y so f t w a r e C l e a r e d b y so f t w a r e C l e a r e d b y so f t w a r e Timer0 and Timer1 timing diagram Reset conditions The HT9580 will reset the whole chip when the following conditions are met: · Power On · The external RESET pin is held low for at least 1 ms · The WDT overflows The input is used to reset the mC. Reset must be held low at least 1 ms after VDD reaches oper- ating voltage from a power down. A positive transition on the chip reset will then cause an initialization sequence to begin. After the sys- tem is operating, a low on this line of at least 1 ms in duration will cause mC activity. When a positive edge is detected, there is an initializa- tion sequence lasting 8-clock cycles. Then the interrupt mask flag is set, the decimal mode is cleared and the program counter is loaded with the restart vector from locations FFFC (low byte) and FFFD (high byte). This is the start lo- cation for program control. This input should be high during normal operation. |
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