82374EB datasheet(86/208 Pages) INTEL

86 / 208 page

82374EB82374SB

Third OCW3 provides control for reading the In-Service Register (ISR) and the Interrupt Request Register

(IRR) Either the ISR or IRR is selected for reading with a write to OCW3 Bits 0 and 1 carry the encoded

command to select either register The next IO read to the OCW3 port address will return the register status

specified during the previous write The register specified for a status read is retained by the interrupt control-

ler Therefore a write to OCW3 prior to every status read command is unnecessary provided the status read

desired is from the register selected with the last OCW3 write

Bit

Description

Reserved

Must be 0

SMM

If ESMMe1 and SMMe1 the Interrupt Controller will enter Special Mask Mode If ESMMe1

and SMMe0 the Interrupt Controller will revert to normal mask mode When ESMMe0 SMM has no

effect

Enable Special Mask Mode

When this bit is set to 1 it enables the SMM bit to set or reset the Special

Mask Mode When ESMMe0 the SMM bit becomes a ‘‘don’t care’’

OCW3 Select

When selecting OCW3 bit 3 must be a 1 and bit 4 must be 0 If bit 4 is a 1 the Interrupt

Controller interprets the write to this port as an ICW1 Therefore always ensure that bits 43 are

‘‘01b’’ when writing an OCW3

Poll Mode Command

When bit 2 is a 0 the Poll command is not issued When bit 2 is a 1 the next

IO read to the Interrupt Controller is treated as an Interrupt Acknowledge cycle An encoded byte is

driven onto the data bus representing the highest priority level requesting service

Bits 10 provide control for reading the In-Service Register (ISR) and the

Interrupt Request Register (IRR) When bit 1e0 bit 0 will not effect the register read selection When

bit 1e1 bit 0 selects the register status returned following an OCW3 read If bit 0e0 the IRR will be

read If bit 0e1 the ISR will be read Following ICW initialization the default OCW3 port address read

will be ‘‘read IRR’’ To retain the current selection (read ISR or read IRR) always writea0tobit 1

when programming this register The selected register can be read repeatedly without reprogramming

OCW3 To select a new status register OCW3 must be reprogrammed prior to attempting the read

82374EB Datasheet(PDF) 86 Page - Intel Corporation