82374EB datasheet(93/208 Pages) INTEL

93 / 208 page

82374EB82374SB

37 APIC Registers

This section describes the registers used to program the Advanced Programmable Interrupt Controller The

IO APIC registers are accessed by an indirect addressing scheme using two registers (IOREGSEL and

IOWIN) that are located in the CPU’s memory space (memory address specified by the APICBASE Register)

To reference an IO APIC register a Dword memory write loads the IOREGSEL Register with a 32-bit value

that specifies the APIC register The IOWIN Register then becomes a four byte window pointing to the APIC

Decode section

All APIC registers are accessed using 32-bit loads and stores This implies that to modify a field (eg bit byte)

in any register the whole 32-bit register must be read the field modified and the 32-bits written back In

addition registers that are described as 64-bits wide are accessed as multiple independent 32-bit registers

371 IOREGSELIO REGISTER SELECT REGISTER

Memory Address

FEC0 x000h (82374EB) (xeSee APICBASE Register)

FEC0 xy00h (82374SB) (xyeSee APICBASE Register)

Default Value

00h

Attribute

ReadWrite

Size

32 Bits

This register selects an IO APIC Unit register The contents of the selected 32-bit register can be manipulated

via the IO Window Register

Bit

Description

318

Reserved

APIC Register Address

Bits 70 specify the APIC register to be readwritten via the IOWIN

372 IOWINIO WINDOW REGISTER

Memory Address

FEC0 x010h (82374EB) (xeSee APICBASE Register)

FEC0 xy10h (82374SB) (xyeSee APICBASE Register)

Default Value

00h

Attribute

ReadWrite

Size

32 Bits

This register is mapped onto the IO Unit’s register selected by the IOREGSEL Register Readabilitywritability

82374EB Datasheet(PDF) 93 Page - Intel Corporation