UPC1876 datasheet(20/40 Pages) NEC

20 / 40 page

µPC1876

Data Sheet S11666EJ4V0DS00

PRECAUTIONS

4.1

Impedance of Input Pins and Output Pins

Each impedance of input and output pins are the following.

Pin name

Impedance

Input

COMPOSITE SIGNAL INPUT

80 k

Ω

SAP DISCRIMINATION FILTER INPUT

40 k

Ω

SAP SINGLE INPUT

80 k

Ω

WIDE BAND VCA INPUT

80 k

Ω

MONAURAL OFFSET ABSORPTION 1

80 k

Ω

Output

SAP BPF OUTPUT

360

Ω

SAP SINGLE OUTPUT

360

Ω

VARIABLE EMPHASIS OUTPUT

360

Ω

MONAURAL OFFSET ABSORPTION 2

360

Ω

R CHANNEL OUTPUT

Ω

L CHANNEL OUTPUT

Ω

Scattering rate of impedance is about

±30%.

4.2

Output Load Impedance

If the L CHANNEL OUTPUT pin and the R CHANNEL OUTPUT pin are connected to GND through 10 k

Ω resistor,

they can drive 700

Ω load impedance.

And, when connecting a load capacitance over 100 pF to the L/R CHANNEL OUTPUT pins, parasitic oscillation

can cause. In this case, insert a resistor between the L/R CHANNEL OUTPUT pins and the load capacitance. Note

that the load capacitance changes by printed-wiring pattern of set.

Caution To insert the DC load resistor (RL) between the L/R CHANNEL OUTPUT pins and GND, the RL should

be equal or more than 3 k

Ω. Note that the DC current increments 4.5/RL [A] per one output pin when

inserting the RL, because the medium potential is 4.5 V (VCC = 9 V).

If the RL is less than 3 k

Ω, the distortion rate may become worse extremely.

UPC1876 Datasheet(PDF) 20 Page - NEC

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