ADAV400_15 datasheet(5/36 Pages) AD

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ADAV400

Rev. A | Page 5 of 36

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

HEADPHONE OUTPUT (SINGLE ENDED)

Measured at headphone output with 32 Ω load,

headphone amplifier register contents = 0x0001

Number of Channels

One stereo channel

Resolution

Bits

Full-Scale Analog Output

V rms

Dynamic Range

A-Weighted

−60 dBFS with respect to full-scale code input

Total Harmonic Distortion + Noise

−84

−3 dBFS with respect to full-scale code input

Gain Error

Interchannel Gain Mismatch

0.5

DC Offset

−30

Relative to VREF

Power Supply Rejection

−84

1 kHz, 300 mV p-p signal at AVDDn1

PLL SECTION3

Master Clock Input (MCLKI)

64 × fS

512 × fS

MHz

SRC3

Dynamic Range

A-Weighted

115

−60 dBFS input (worst-case input, fS = 50 kHz)

Total Harmonic Distortion + Noise

−113

0 dBFS input (worst-case input, fS = 50 kHz)

Sample Rate

kHz

DIGITAL INPUT/OUTPUT

Input Voltage High (VIH)

2.0

ODVDD

Input Voltage Low (VIL)

0.8

Input Leakage (IIH @ VIH = ODVDD)

μA

Input Leakage (IIL @ VIL = 0 V)

−60

μA

Output Voltage High (VOH @ IOH = 0.4 mA)

2.4

Output Voltage Low (VOL @ IOL = −3.2 mA)

0.4

Input Capacitance

SUPPLIES

Analog Supplies (AVDDn)1

3.15

3.30

3.45

Digital Supplies (DVDD)

1.6

1.8

2.0

Interface Supply (ODVDD)

3.15

3.30

3.45

Supply Current, Normal Mode

Analog Current (AVDD1)

110

Digital and Interface Current

120

135

MCLK = 12.288 MHz, ADCs and DACs active,

headphone outputs active and driving a 32 Ω load,

Power control register = 0xFFFF

PLL Current

Supply Current, Power-Down Mode

Analog Current

8.5

RESET low, MCLK = 3.074 MHz, AINx = AGND, DAC

and headphone outputs floating

Digital and Interface Current

1.5

PLL Current

μA

1 The n refers to supply number.

2 The m refers to channel number, and the Y refers to stereo channel identifier: L for left channel or R for right channel.

3 Guaranteed by design.

4 Measured on one DAC with other DACs and ADCs off.

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