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UPD16664 Datasheet(PDF) 3 Page - NEC |
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UPD16664 Datasheet(HTML) 3 Page - NEC |
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3 / 52 page ![]() Data Sheet S13780EJ1V0DS00 3 µµµµ PD16664 2. BLOCK DIAGRAM DIR PL0, 1 TEST A0-A16 Control /CS, /OE /WE, /UBE D0-D15 /REFRH /RESET /DOFF VCC2 operation VCC1 operation MS OSC1 STOP OSC2 RDY BMODE VCC2 operation VCC1 operation Address input control Address management circuit Arbiter RAM 208 × 160 × 2 bits Data latch (1) Data latch (2) Gray level generation circuit Internal timing generation Self-diagnosis circuit Gray level control Data bus control CR oscillator Liquid crystal timing generation PULSE PULSE /FRM /FRM STB STB /DOUT L1 L2 Y1 Y2 Y3 V0 V1 V2 Y208 Liquid crystal drive circuit 208 outputs DEC Level shifter CMODE0,1 DMODE |
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