UPD16664 datasheet(2/52 Pages) NEC

2 / 52 page

Data Sheet S13780EJ1V0DS00

µµµµ PD16664

1. PIN NAME

Classification

Pin Name

Note

I/O

Function

CPU interface

VCC2

D0-D15

A0-A16

/CS

/OE

/WE

/UBE

RDY

I/O

Data bus: 16 bits

Address bus: 17 bits

Chip select

Read signal

Write signal

Upper byte enable

Ready signal to CPU (“H”: ready)

Control signals

VCC2

PL0

PL1

DIR

DMODE

CMODE0,1

BMODE

/REFRH

TEST

/RESET

/DOFF

OSC1

OSC2

I/O

–

Specifies LSI layout position (No. 0 to 3)

Specifies liquid crystal panel layout position

Duty selection (“H” = 1/128 duty, “L” =1/160 duty)

Number of column outputs selection

Master/slave selection (“H”: master mode)

Data bus bit selection (“H” = 8 bits, “L” = 16 bits)

Self-diagnosis reset pin (wired-OR connection)

Test pin (“H” = test mode, with pull-down resistor)

Reset signal

Display OFF input signal

External resistor pin for oscillator

VCC1

STB

/FRM

PULSE

/DOUT

I/O

Column drive signal (MS pin “H” = output, MS pin “L” = input)

Frame signal (MS pin “H” = output, MS pin “L” = input)

25-level pulse modulation clock

Row driver drive level select signal (first line)

Row driver drive level select signal (second line)

Display OFF output signal

Liquid crystal drive

Y1-Y208

Liquid crystal drive output

Power

GND

VCC1

VCC2

–

Ground (two pins for VCC1 system, three pins for VCC2 system)

Power supply for liquid crystal drive and row driver interface

Power supply for logic

Liquid crystal drive analog power

Note VCC2 system pins : D0 to D15, A0 to A16, /CS, /OE, /WE, /UBE, RDY, BMODE, PL0, PL1, DIR,

OSC1, OSC2, /RESET, /DOFF, TEST, MS, CMODE0, CMODE1, DMODE

VCC1 system pins : STB, /FRM, L1, L2, /DOUT, PULSE

Remark

/xxx indicates active low signals.

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