UM1693 datasheet(25/196 Pages) STMICROELECTRONICS

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UM1693

Reverse battery protection

195

A voltage drop of RDS(on) × ISON is seen in the ground return path when using the N-MOS

FET. A voltage drop of RDS(on) × ILOAD is seen in the power path when using the PMOS

FET. In the past, the primary disadvantage of these circuits has been the high cost of low

RDS(on), low-threshold voltage FETs. However, advances in semiconductor processing have

resulted in FETs that provide minimal drops in small packages.

The N-channel MOSFET is connected in such a way, that its gate is driven directly by the

battery voltage and its drain is connected to ground. In normal condition it is ON whilst a

reverse battery event switches it OFF (because VGS ≤ 0) and protects the HSD.

In Figure 8 is reported a generic schematic with N-channel MOSFET configuration. In this

case, like for the solution with Diode || Resistor network in the GND line, the HSD´s output

stage body diode is forward biased and therefore is conducting during the reverse battery.

The current is limited by the external load. Since no thermal protection works in reverse

condition, special care must be taken on the total power dissipation in the device. During the

reverse battery event, the peak junction temperature shall remain safely below the

maximum allowed junction temperature (TTSD_max). Considering a voltage drop on the

internal body diode of VF_max = 0.7 V, the resulting power dissipation in the HSD per output

channel is PD = 0.7 V · ILOAD.

Zthj-a diagrams reported in HSD datasheets help the user to calculate the maximum

affordable load current for a given PCB layout.

UM1693 Datasheet(PDF) 25 Page - STMicroelectronics