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AN4129 Datasheet(PDF) 25 Page - STMicroelectronics |
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AN4129 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 39 page ![]() AN4129 Circuit description and design guidance Doc ID 023314 Rev 1 25/39 Figure 30. Conducted EMI limits We design for peak noise at the FCC limit at 150 kHz. The design leaves some margin due to the frequency selection. Peak-to-peak of the 2 mVrms limit is about 6 mV per line relative to ground. The input filter is shown below. Figure 31. Input EMI filter The typical differential filter consists of 4 components. Starting at the noise source these are: ● Shunt capacitor on the converter input (C1) ● Series inductor L1 and L2 in series, or differential (leakage) inductance of a common mode choke ● Shunt capacitor across line (C2) ● Line impedance (in the LISN, about 100 Ω line-to-line, 50 Ω line-to-ground at measurement frequencies). 4.12.1 Supporting the flyback input current First we consider the differential current drawn by the converter. The input current waveform at line peak is sketched below: |
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