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AN2476 Datasheet(PDF) 27 Page - STMicroelectronics |
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AN2476 Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 49 page ![]() AN2476 STR750 library low power mode functions 27/49 Note: When fetching from internal Flash the max System Cock (CK_SYS) frequency is 60MHz (64MHz when fetching from SRAM). The table below describes the allowed combination of MRCC_CKSYS and MRCC_PLL parameters: Note: “x:” allowed combination “-” : not allowed combination Example: /* Set CK_SYS to 60 MHz */ if(MRCC_CKSYSConfig(MRCC_CKSYS_OSC4MPLL, MRCC_PLL_Mul_15) == SUCCESS) { /* Place your code here */ } else { /* Add here some code to deal with this error */ } 2.2 MRCC_HCLKConfig MRCC_CKSYS MRCC_CKSY S_FREEOSC MRCC_CKSY S_OSC4M MRCC_CKSY S_OSC4MPLL MRCC_CKSY S_RTC MRCC_PLL_Disabled X X - X MRCC_PLL_NoChange - X - X MRCC_PLL_Mul_12 - - X - MRCC_PLL_Mul_14 - - X - MRCC_PLL_Mul_15 - - X - MRCC_PLL_Mul_16 - - X - Function Name MRCC_HCLKConfig Function Prototype void MRCC_HCLKConfig(u32 MRCC_HCLK) Behavior Description Configures the AHB clock (HCLK). Input Parameter MRCC_HCLK: defines the AHB clock. This clock is derived from the system clock(CK_SYS). Refer to section “MRCC_HCLK” for more details on the allowed values of this parameter. Output Parameter None Return Parameter None Required preconditions None Called functions None |
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