AN2857

Run and low-power modes

Doc ID 15241 Rev 3

17/31

Equation 2

the interrupt routine. It depends on the halt phase configuration (regulator used and Flash

state). Some typical values for this parameter are given in Table 11, Table 12, Table 13, and

Table 14.

implementation.

configuration (regulator used and Flash state). This time includes the context saving.

4.4

Halt mode

In halt mode, all clocks are stopped while the RAM content and all registers are preserved.

In this mode, the MVR regulator is switched off to limit power consumption. Only the LPVR

regulator is active.

4.4.1

Entering halt mode

The MCU enters halt mode when the HALT instruction is executed.

4.4.2

Exiting halt mode

Wakeup from halt mode is triggered by an external interrupt, sourced by a GPIO pin

configured as an interrupt input or a peripheral interrupt. Interrupts which can wake up the

device from halt mode include:

●

External interrupt (GPIO)

●

CAN receive interrupt

●

SPI end of transfer

●

●

Reset

4.4.3

Flash configuration during halt mode

By default, when entering halt mode, the Flash is in power-down mode. To maintain the

Flash in operating mode during halt mode the HALT bit of Flash control register 1

(FLASH_CR1) must be set.

When the Flash is in power-down mode, the power consumption of the device is reduced

but the wakeup time increases.

t

RUN

t

WKUP

t

CODE

t

SHDW

++

=