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LT3590

3590f

BLOCK DIAGRAM

PIN FUNCTIONS

SW (Pin 1/Pin 3): Switch Pin. Minimize trace area at this

pin to minimize EMI. Connect the inductor at this pin.

GND (Pins 2, 3, 4/Pin 2): Ground Pins. All ground pins

should be tied directly to local ground plane. Proper

soldering of these pins to the PCB ground is required to

achieve the rated thermal performance.

CTRL (Pin 5/Pin 1): Dimming and Shutdown Pin.

Connect it below 100mV to disable the switcher. As the

pin voltage is ramped from 0V to 1.5V, the feedback volt-

age (VIN -VLED) ramps from 0mV to 200mV, controlling

the LBD current.

LED

−

VREG (Pin 6/Pin 6): Internally Generated 3.3V Regulated

Output Pin. Must be locally bypassed with a 0.1μF X5R

capacitor.

LED (Pin 7/Pin 5): Connection point for the anode of the

highest LED and the sense resistor.

VIN (Pin 8/Pin 4): Input Supply Pin. Must be locally by-

passed.

Exposed Pad (NA/Pin 7): Ground. The Exposed Pad

should be soldered to the PCB ground to achieve the

rated thermal performance.

(SC70/DFN)

Figure 1. Block Diagram

LED

470μH

0.1μF

1μF

6.8Ω

VIN

48V

1μF

VOUT

VIN

PWM

REG

VREG

–

∑

RAMP

GENERATOR

850kHz

OSCILLATOR

GND

CTRL

CONTROL

3590 F01

ISNS

–

VREF

1.25V

START-UP

CONTROL

EAMP

A = 6.25

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