STM32F4 ADC accuracy options

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STM32F4 ADC accuracy options

This section only applies to STM32F42x/F43x microcontrollers.

Before describing the STM32F42x and STM32F43x ADC evaluation results, the silicon

configurable options embedded on these products to enhance the ADC accuracy will be

detailed.

4.1

Configuration options for ADC accuracy

By default, on these products, noise filtering techniques are activated internally between the

ADC analog block and other microcontroller blocks. These techniques will reduce the power

supply noise, the signal crosstalk and the EMI-induced noise. For more details about

practical ADC results in this condition, please refer to section 4.2.3.

To further improve the ADC accuracy, two configurable options are available. The following

names are used throughout the document:



Default: The default STM32 configuration which is always active out of reset.



Option 1: The first configurable option which can be activated by firmware.



Option 2: The second configurable option which can be activated by firmware.

4.1.1

Option 1

This option can be activated or not by firmware.

By default, it is not active. When activated by firmware, it continuously masks the extra flash

access generated by the prefetch mechanism which can produce random noise impacting

the ADC accuracy.

This could be activated by setting the ADCDC1 (bit 13) in the PWR_CR register.

Warning:

This bit can only be set at the following conditions:

- Prefetch must be OFF.

- VDD voltage ranges from 2.4 V to 3.6 V.

- This bit must not be set when the ADCxDC2 bit in

SYSCFG_PMC register is set.

For more details about the exact firmware sequence to enable Option 1, please refer to

Section C.1: Option 1.

The ADC accuracy results when activating this option, will be detailed in next section.

4.1.2

Option 2

This option can be activated or not by firmware.

By default, it is not active. When activated by firmware, it masks the internal flash noise

during the last ADC sampling cycle. This will improve the ADC immunity versus internal

spurious flash noise.