AN4073 datasheet(20/32 Pages) STMICROELECTRONICS

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STM32F4 ADC accuracy options

AN4073

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DocID022945 Rev 5

4.2.1

Hardware Setup

The hardware environment used for the ADC tests is the same as the one described in

Section 3.1.1: Hardware setup, with the use of STM32F43x.

4.2.2

Common firmware setup

 ADC1 Channel 1 is used in single conversion mode,

 The sampling time is fixed to 3 ADC clock cycles,

 50000 acquisition was taken for each fixed analog input voltage,

All tests are done with FADC = 36 MHz, sampling time= 3 ADC cycles and ADC

resolution = 12 bits in order to achieve the fastest ADC conversion which is equal to

2.4 MSPS.

4.2.3

Results

The following measurements were taken while evaluating the impact of the ADC accuracy

options embedded on these products at three different ART configurations which are:

 ART ON: (data cache + instruction cache + prefetch) ON,

 ART OFF: (data cache + instruction cache + prefetch) OFF,

 (Data cache + instruction cache) ON + Prefetch OFF

ADC measurements when ART is ON

The following table and graph show the ADC code distribution when ART is ON at two

different conditions: Default STM32 configuration and when Option 2 is active:

Table 7. Distribution of ADC codes when ART is ON

VIN

Default

Option 1

Option 2

Dispersion

(LSB)

sample over

+-5 LSB

Dispersion

(LSB)

sample

over +-5

LSB

Dispersion

(LSB)

sample over

+-5 LSB

0.3 V

(1)

1. Option 1 is not applicable since Prefetch is ON in this case.

40%

1.65 V

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