UPD75402ACT datasheet(32/48 Pages) NEC

32 / 48 page

µPD75402A(A)

Typ.

Max.

Min.

0.95

3.8

Unit

µs

Note 2

AC CHARACTERISTICS (Ta = –40 to +85 ˚C, V DD = 2.7 to 6.0 V, VSS = 0 V)

Notes 1. The cycle time of the CPU clock (

Φ)

(minimum instruction execution time)

depends on the connected resonator

frequency and the setting of the proc-

essor clock control register (PCC).

The figure on the right side shows

the cycle time tCY characteristics for

the supply voltage VDD.

2. This value is 2tCY or 128/fXX according

to the setting of the interrupt mode

Symbol

tCY

tINTH, tINTL

tRSL

Parameter

CPU clock cycle time Note 1

(minimum instruction execu-

tion time = one machine cycle)

Interrupt input high/low level

width

RESET low-level width

Conditions

VDD = 4.5 to 6.0 V

INT0

INT2

Guaranteed operating

range

0.5

0123456

Supply voltage VDD [V]

tCY vs. VDD

UPD75402ACT Datasheet(PDF) 32 Page - NEC

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