RT7296C

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is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DS7296C-00

May

2015

12

Figure 3. Derating Curve of Maximum Power

Dissipation

Layout Considerations

For best performance of the RT7296C, the following

layout guidelines must be strictly followed.



Input capacitor must be placed as close to the IC as

possible.



SW should be connected to inductor by wide and

short trace. Keep sensitive components away from

this trace.



Keep every trace connected to pin as wide as

possible for improving thermal dissipation.

SW

R1

R2

SW should be connected to inductor by Wide and

short trace. Keep sensitive components away from

this trace. Suggestion layout trace wider for thermal.

Via can help to reduce

power trace and improve

thermal dissipation.

The feedback components

must be connected as close

to the device as possible.

GND

SS

SW

FB

EN/SYNC

BOOT

VIN

PVCC

GND

Css

Input capacitor must be placed as close

to the IC as possible. Suggestion layout

trace wider for thermal.

Figure 4. PCB Layout Guide

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

0

25

50

75

100

125

Ambient Temperature (°C)

Four-Layer PCB